Thin film transistor array substrate
A technology of thin film transistors and array substrates, which is applied in the field of liquid crystal displays, can solve problems such as image retention, image flicker, and numerical values that cannot be accurately measured, and achieve the effect of correcting the public voltage
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Embodiment 1
[0040] This embodiment provides a thin film transistor array substrate, such as Figure 4 As shown, the thin film transistor array substrate includes a plurality of scanning lines S and a plurality of data lines D, the plurality of scanning lines S and the plurality of data lines D perpendicularly intersect each other to define M rows×N columns of pixel units P, each pixel unit P includes at least a first thin film transistor 10 and a pixel electrode 20 , the gate of the thin film transistor 10 is electrically connected to the scan line S, the drain is electrically connected to the data line D, and the source is electrically connected to the pixel electrode 20 .
[0041] Further, the thin film transistor array substrate further includes a common electrode layer 30, wherein the common electrode layer 30 is divided into alternately spaced M first common electrodes 31 and M second common electrodes 32 along the row direction. The m first common electrode 31 and the m second commo...
Embodiment 2
[0051] The thin film transistor array substrate provided in this embodiment is different from Embodiment 1 in that in this embodiment, two second thin film transistors 40 are connected between the m first common electrode 31 and the m second common electrode 32 .
[0052] One of the preferred embodiments, such as Figure 9 As shown, the two second thin film transistors 40 are respectively arranged in the pixel unit P in the first column of the mth row and the Nth column of the mth row; the gates of the two second thin film transistors 40 are respectively connected to the first The drains of the scan lines S corresponding to the m rows of pixel units are respectively connected to the m th second common electrodes 32 , and the sources are respectively connected to the m th first common electrodes 31 .
[0053] In another preferred embodiment, as Figure 10 As shown, the two second thin film transistors 40 are arranged outside the pixel unit P in the mth row, and are respective...
Embodiment 3
[0056] The thin film transistor array substrate provided in this embodiment is different from Embodiment 1 in that the first common electrodes 31 and the second common electrodes 32 in this embodiment extend along the column direction.
[0057] Specifically, such as Figure 11 As shown, the thin film transistor array substrate includes a plurality of scanning lines S and a plurality of data lines D, the plurality of scanning lines S and the plurality of data lines D perpendicularly intersect each other to define M rows×N columns of pixel units P, each pixel unit P includes at least a first thin film transistor 10 and a pixel electrode 20 , the gate of the thin film transistor 10 is electrically connected to the scan line S, the drain is electrically connected to the data line D, and the source is electrically connected to the pixel electrode 20 .
[0058] Further, the thin film transistor array substrate further includes a common electrode layer 30, wherein the common electrod...
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