A kind of floating grid and its preparation method

Abstract

The invention discloses a floating gate and a preparation method thereof. The preparation method comprises the following steps: sequentially forming a gasket oxidation layer and a protecting dielectric layer on a substrate, carrying out imaging processing on the protecting dielectric layer, the gasket oxidation layer and the substrate to form active regions and shallow trench isolation regions and carrying out oxidation layer filling on the shallow trench isolation regions; stripping the residual protecting dielectric layer to form first grooves; forming side walls on the inner walls of the first grooves; removing the residual gasket oxidation layer to reserve a shallow trench oxidation layer close to the side walls; sequentially removing the side walls and the excessive shallow trench oxidation layer to form second grooves; forming tunneling oxidation layers on the active regions exposed in the second grooves; and forming gates on the tunneling oxidation layers. According to the floating gate disclosed by the embodiment o the invention, reduction of the storage property of a floating gate device caused by reduction of the distances between adjacent floating gates is avoided under the premise of ensuring that the gasket oxidation layer is removed clean.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductors, and in particular to a floating gate and a manufacturing method thereof. Background technique [0002] Floating gate transistors are widely used in nonvolatile memories. Floating gate memory devices store information by storing charges on the floating gate. Specifically, when a sufficiently high voltage is applied to the drain and gate of the floating gate transistor, and the source and substrate are grounded, the gap between the drain and the substrate The reverse breakdown of the PN junction between them generates a large number of high-energy electrons, which pass through the thin tunnel oxide layer and accumulate on the floating gate. When the applied voltage is removed, the electrons on the floating gate are stored for a long time because there is no discharge circuit. The role of the tunneling oxide layer includes blocking the electron discharge circuit, so its quality ...

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Problems solved by technology

[0003] In the process of preparing the floating gate in the prior art, the tunnel oxide layer has the problem of residual liner oxide layer. Due to the poor quality of the liner oxide layer, the floating gate charge will be leaked, thereby reducing the storage performance of the floating gate type memory device.

At present, the residual problem of the pad oxide layer can be solved by increasing the wet etching time, but prolonging the etching time will etch away part of the shallow trench oxide layer, resulting in smaller spacing between adjacent floating gates and increased interference

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