Field Effect Transistor with Multiple Width Electrode Structure and Manufacturing Method

Abstract

A field-effect transistor with a multi-width electrode structure and its manufacturing method. In the field-effect transistor, an epitaxial layer on a semiconductor substrate is provided with a groove, and an oxide layer is arranged in the groove, and an oxide layer is arranged on the oxide layer. A first electrode portion with a width and a first height and a second electrode portion with a second width and a second height. The gate oxide layer covers the oxide layer and the second electrode portion, the gate oxide layer is provided with a gate portion with a third width, and the epitaxial layer is provided with a body region and a source region adjacent to the gate portion , and the source region and the gate portion are covered with an interlayer dielectric layer. The source electrode covers the body region and the interlayer dielectric layer and is in contact with the source region. Wherein, the first height is greater than or equal to the second height, the first width is smaller than the second width, and the second width is smaller than the third width.

Description

technical field [0001] The present invention relates to a field effect transistor with multi-width electrode structure and its manufacturing method, in particular to a field effect transistor with multi-width electrode part and its manufacturing method. Background technique [0002] With the development of science and technology and the progress of the times, the progress of semiconductor manufacturing technology has made the metal-oxide-semiconductor field effect transistor (Metal-Oxide-Semiconductor Field Effect Transistor; MOSFET, hereinafter referred to as MOSFET) highly developed. [0003] Among them, the existing semiconductor manufacturing process uses various methods to form MOSFETs. Generally speaking, an epitaxial layer is generally formed on a semiconductor substrate, and then a trench is formed on the epitaxial layer, and different steps are used to form a MOSFET in the trench. as the gate of the transistor. [0004] However, in the MOSFETs manufactured by the e...

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Problems solved by technology

[0004] However, in the MOSFETs manufactured by the existing methods for forming the above-mentioned gates, there are generally problems of high total gate charge (Qg) and high actual performance index (Figure of Merit; FOM), wherein the total gate charge is Refers to the charge required by the gate when the MOSFET is fully turned on. The total gate charge is related to the startup speed of the MOSFET. High total gate charge will reduce the switching speed and increase the gate loss, thereby increasing the switching loss and reducing efficiency. ; Actual performance index is determined by on-resistance and total gate charge (Qg multiplied by Rdson), high actual performance index indicates poor conduction loss and switching loss

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