A kind of three-dimensional semiconductor memory and its preparation method

A semiconductor and memory technology, applied in the field of three-dimensional semiconductor memory, can solve the problems of reduced channel current, polysilicon inversion failure, low electron mobility, etc., to achieve the effect of improving electron mobility, programming and erasing performance.

Active Publication Date: 2020-10-09
YANGTZE MEMORY TECH CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the position or shape of the conductive part is not good, it is easy to cause inversion failure of polysilicon, resulting in high resistance of polysilicon and low electron mobility
This results in reduced channel current which severely impacts the programming / writing performance of 3D memory

Method used

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  • A kind of three-dimensional semiconductor memory and its preparation method
  • A kind of three-dimensional semiconductor memory and its preparation method
  • A kind of three-dimensional semiconductor memory and its preparation method

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Embodiment Construction

[0080] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0081] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0082] As indicated in this application and claims, the terms "a", "an", "an" and / or "the" do not refer to the singular and may include the plural unless the context clearly indicates an exception. Generally speaking, the terms "comprising" and "comprising" only suggest the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list, and the method or device may also contain other st...

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Abstract

The invention provides a three-dimensional semiconductor memory, comprising a substrate, a first stack structure, a second stack structure located on the first stack structure, a first channel hole in the first stack structure; alignment in the second stack structure The second channel hole of the first channel hole; the intermediate conductive part and the barrier layer between the first channel hole and the second channel hole, the barrier layer is located above the intermediate conductive layer, and the first channel hole in the first channel hole The first channel layer is in contact with the middle conductive part through the middle barrier layer, and the second channel layer is in contact with the middle conductive part. The three-dimensional semiconductor storage and its preparation method of the present invention, by isolating the second storage layer and the middle conductive part, avoids the channel layer and the middle conductive part to form a tortuous circuit, ensures the inversion of the middle conductive part, and improves the electron mobility. Therefore, the present invention can improve the programming and erasing performance of the three-dimensional memory.

Description

technical field [0001] The invention relates to the field of three-dimensional semiconductor memory, in particular to a three-dimensional semiconductor memory with high reliability and a preparation method thereof. Background technique [0002] In order to overcome the limitations of two-dimensional memory devices, the industry has developed memory devices with a three-dimensional (3D) structure to increase integration density by three-dimensionally arranging memory cells on a substrate. [0003] In a three-dimensional memory device such as 3D NAND flash memory, a memory array may include a core region having a channel structure. The channel structure is formed in a channel hole vertically penetrating through a stack of the three-dimensional memory device. The via holes of the stacked layers are usually formed by a single etch. However, in order to increase the storage density and capacity, the number of layers (tier) of the three-dimensional memory continues to increase, ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11582H01L27/1157H01L27/115
CPCH10B69/00H10B43/27
Inventor 王恩博闾锦张易杨号号庞亮张勇陶谦胡禺石吕震宇
Owner YANGTZE MEMORY TECH CO LTD
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