MOS transistor array type multi-system and decimal bit weight subtracter

Abstract

An MOS transistor array type multi-system and decimal bit weight subtracter is composed of three parts, namely a logic operation part, a fractal control part and a meaning bearing connection part. Thelogical operation part undertakes all logical operations of the input information; the fractal control part is used for output isolation and instruction distribution; the bearing connecting part is used for connecting the instruction marks to the corresponding output bit weight lines according to operation requirements and results; the logic operation part and the fractal control part are formedby connecting a multi-system arithmetic operator assignment fractal integrated unit circuit of quantification logic of patent application 20171111971. X; the composition scales of the MOS transistor array type multi-valued bit weight full and controller are different following with the different carry systems, the binary system has two paths of bit weight inputs and four groups of instruction fractal isolation outputs, the ternary system has two paths of bit weight inputs and nine groups of instruction fractal isolation outputs, and the quaternary system has two paths of bit weight inputs andsixteen groups of instruction fractal isolation outputs.

Description

technical field [0001] The invention relates to the field of computer technology, in particular to a "MOS tube array multi-ary and decimal bit weight subtractor" which is one of the basic hardware for realizing a multi-valued computer [0002] technical background [0003] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware supporting multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , Multiplication, division arithmetic operations and key circuits of logic operations are called "quantization...

AI Technical Summary

Problems solved by technology

[0003] So far all computers and their related digital systems are binary. Although multi-valued computing has many advantages, it develops very slowly because there is no key hardware to support multi-valued computing. It can be said that multi-valued computers, especially decimal The realization of computer is almost zero, in view of this situation, the present invention proposes a kind of simple and effective multi-value calculation implementation circuit, especially the effective method of ten-value calculation and realizes multi-value, especially ten-value addition and subtraction with binary hardware , multiplication, division arithmetic operations and the key circuits of logic operations, which are called "quantization logic" and their circuits

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