8 results about "Arithmetic operators" patented technology

An arithmetic operator includes: multiple arithmetic elements each serving as a programmable circuit capable of programming a logical function; and a data bus that connects two or more of the multiple arithmetic elements and that transmits transmission data. The transmission data includes first data used in one of the two or more arithmetic elements and second data used to reconfigure a logical function of any one of the two or more arithmetic elements, the transmission data destined for each of the two or more arithmetic elements on the same data bus is collectively transmitted on the same data bus at a cycle different with each of the two or more arithmetic elements, and each arithmetic elements receives the first data and the second data for own arithmetic element by extracting the transmission data destined for the own arithmetic element at a cycle associated with the own arithmetic element.

A system and method are provided for converting high-level source code into arithmetic circuitry representing functions expressed in the source code. The invention includes a translation / interpretation component for performing the conversion. In a preferred embodiment, the source code is a smart contract, such as a contract used in connection with a blockchain platform. A method according to an embodiment includes the steps of processing a portion of a high-level source code (e.g., a smart contract) to generate an arithmetic circuit. The arithmetic circuit includes one or more arithmetic gates arranged to represent at least some of the functions expressed in the source code. The processing involves evaluating one or more constants provided in the source code to generate one or more expressions containing Boolean and / or arithmetic operators. The arithmetic circuit includes an n-bit line connected to the arithmetic gate; it may be used to provide hardware and / or software circuitry. The arithmetic circuitry may be used to generate quadratic plans that may be executed on the processor.

A computer mediated method for effecting proactive control of computer-controlled processes and / or devices related to a vehicle. Proactive control is enabled by computer recognition of a proactive user who is drawing (writing), signing, keyboarding, or voicing characters (letters, numbers, punctuation) and meta commands (such as DONE, NEXT, CANCEL) and transmitting an encoding of the characters and meta commands to the computer program that is empowered to control the vehicle. Drawn characters may be drawn on a touch sensitive device, on a surface viewable by a camera, or in three-dimensional space unrelated to a surface. All mechanisms for delivering encoded characters and meta commands to the computer directly controlling the vehicle are subsumed by this patent. Feedback is provided by the computer directly controlling the vehicle via a display and / or speech in order to close the loop on interpretation of the character and meta commands.

To provide methods and systems for lossless compression and serialization of arithmetic circuits into a bit stream using compression techniques such as arithmetic coding.SOLUTION: An arithmetic circuit representing a smart contract may be compressed using arithmetic coding, thereby generating a compressed arithmetic circuit that can be stored in or broadcast to a blockchain network using less computational resources (e.g., data storage resources) than would otherwise be needed to store the arithmetic circuit. The arithmetic circuit can be efficiently compressed using entropy coding based on the frequency of elements in a data structure, e.g., of arithmetic operator types. Instructions for deserialization and decompression can also be embedded in a bit stream, and can be used (e.g., by another computer system) to reconstruct the original circuit in a lossless manner.SELECTED DRAWING: Figure 1

A decomposition circuit of an incoming binary number for a binary arithmetic operator, the incoming number having an FP32 floating-point format, the decomposition circuit being hardwired to decompose the incoming number into a pair of high and low components in an internal format with a 9-bit exponent and a 12-bit significand; directly connect the bits of the significand of the high component respectively to a circuit providing the value of the implicit bit and to the most significant bits of the fractional mantissa of the incoming number; directly connect the bits of the significand of the low component respectively to the remaining bits of the fractional mantissa; assign to the exponent of the high component the exponent of the incoming number plus 12; and assign to the exponent of the low component the unchanged exponent of the incoming number.

The invention discloses an expression evaluation method supporting automatic conversion of measurement units. The method comprises the following steps: establishing a three-layer measurement unit system comprising basic unit classification, derived unit classification and measurement unit UOM in an application layer; the method comprises the following steps: after an application layer receives a calculation expression which is initiated by a client, is related to a certain element and comprises a plurality of attributes and arithmetic operators, analyzing the calculation expression initiated by the client to obtain an AST (abstract syntax tree); an application layer accessor generates an SQL query statement of a calculation expression initiated by a user side by traversing the abstract syntax tree AST and sends the SQL query statement to a database, and the SQL query statement comprises basic unit classification, a calculation formula and a conversion coefficient or comprises SQL fragments of the basic unit classification, the calculation formula, the conversion coefficient and offset; and the database calculates the SQL query statement to complete a calculation task required by the calculation expression.

The invention provides systems and methods for converting high level source code into an arithmetic circuit which represents the functionality expressed in the source code. The invention comprises a translation / interpretation component for performing this conversion. In a preferred embodiment, the source code is a smart contract such as those used in relation to a blockchain platform. The invention could be used in relation to the Bitcoin network, for example. A method in accordance with an embodiment comprises the steps of: processing a portion of high level source code (e.g. a smart contract) to generate an arithmetic circuit. The arithmetic circuit comprises one or more arithmetic gates arranged to represent at least some of the functionality expressed in the source code. The processing involves evaluating one or more constants provided in the source code to produce one or more expressions that include Boolean and / or arithmetic operators.

The invention relates to a binary input decomposition circuit (UPCK) for a binary arithmetic operator, the input number having an FP32 floating-point format. The decomposition circuit is wired to decompose the input number (X) into a pair of high and low components (Xh, Xl) in an internal format with a 9-bit exponent and a 12-bit significand. The circuit directly connects the bits of the significand (Xhm) of the high component to a circuit providing the value of the implicit bit and the most significant bits of the fractional mantissa of the input number. The circuit directly connects the bits of the significand (Xlm) of the low component to the remaining bits of the fractional mantissa. The exponent (Xhe) of the high component is set to the exponent of the input number (X) plus 12. The exponent (Xle) of the low component remains unchanged from the input number (X). Figure for the abstract: Fig. 1