Intra-frame sub-block predictor circuit for video encoder and method for implementing same

A technology of video encoder and prediction circuit, which is applied in digital video signal modification, television, electrical components, etc., can solve the problems of reducing time and space costs, reducing encoding quality, etc., to improve efficiency, realize hardware area and circuit design the effect of time

Inactive Publication Date: 2011-05-25
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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AI Technical Summary

Problems solved by technology

[0011] Most of the optimization algorithms for intra-frame prediction are to analyze the pixel texture information of the 4×4 sub-block to be processed, and select one or several of the 9 modes in the standard for prediction, thus saving time and space for hardware design cost, but the reduction in time and space cost also reduces the encoding quality

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  • Intra-frame sub-block predictor circuit for video encoder and method for implementing same
  • Intra-frame sub-block predictor circuit for video encoder and method for implementing same
  • Intra-frame sub-block predictor circuit for video encoder and method for implementing same

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Embodiment Construction

[0050] The present invention will be described in further detail below with reference to the accompanying drawings and in combination with specific embodiments.

[0051] The invention discloses a method for realizing an intra-frame sub-block prediction circuit of a video encoder, which includes: mapping each functional block of the intra-frame sub-block prediction circuit of a video encoder described by a computer program language algorithm to be composed of an operator unit The hardware logic description; the hardware logic description composed of the operator unit generates the hardware integrated circuit of the intra-frame sub-block prediction circuit.

[0052] The intra-frame sub-block prediction circuit of the video encoder implemented by the above method includes a calculation function block for calculating the prediction value, a selection function block for selecting the optimal prediction value from the prediction values, and a function block for selecting the optimal ...

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Abstract

The invention discloses a method for implementing an intra-frame sub-block predictor circuit for a video encoder. The method comprises the following steps of: mapping each encoding functional block of the intra-frame sub-block predictor circuit of the video encoder which is described by a high-level program language algorithm into hardware logic description consisting of arithmetic operator units; and generating a hardware integrated circuit of the intra-frame sub-block predictor circuit by the hardware logic description consisting of the arithmetic operator units. The invention also discloses the intra-frame sub-block predictor circuit of the video encoder, which comprises a calculation encoding functional block for calculating predicted values, a selection encoding functional block for selecting the optimum predicted value from the predicted values and a residual calculation encoding functional block for acquiring the sum of corresponding residual calculation matrix element absolute values according to the optimum predicted value. By the circuit and the method, the efficiency of hardware design is improved.

Description

technical field [0001] The present invention relates to the field of integrated circuits, in particular to an intra-frame sub-block prediction circuit for a video encoder and an implementation method thereof. Background technique [0002] As the integrated circuit manufacturing process enters the stage below 45nm, the scissors gap between the development of integrated circuit design and the progress of integrated circuit technology continues to increase. Data flow algorithms, especially digital media ASIC (Application Specific Integrated Circuit, Application Specific Integrated Circuit) design, face problems such as long design cycle, poor flexibility, poor scalability, etc., and it is difficult to meet the needs of rapid product launch and continuous improvement of functions. [0003] In terms of current IC industry needs, design speed has become an important consideration in IC design methodology. When an integrated circuit manufacturer or an integrated system supplier co...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/36H04N19/593
Inventor 彭建宏王新安胡子一张兴
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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