Chip layout method and device, storage medium and electronic equipment

A chip layout and layout technology, applied in the fields of storage media and electronic equipment, chip layout methods, and devices, can solve the problems of long consumption time, complex process, poor layout accuracy, etc., to shorten the consumption time, improve the accuracy, Accurate effect

Pending Publication Date: 2020-11-17
BOE TECH GRP CO LTD +1
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  • Claims
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Problems solved by technology

[0004] In view of this, the purpose of the present disclosure is to provide a chip layout method, device, storage medium and electronic equipment, which can

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  • Chip layout method and device, storage medium and electronic equipment
  • Chip layout method and device, storage medium and electronic equipment
  • Chip layout method and device, storage medium and electronic equipment

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[0048] In order to make the objectives, technical solutions, and advantages of the present disclosure clearer, the technical solutions of the present disclosure will be described clearly and completely in conjunction with the accompanying drawings of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the protection scope of the present disclosure.

[0049] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the usual meanings understood by those with ordinary skills in the field to which this disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity, or importance, but are only used to distinguis...

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Abstract

The invention provides a chip layout method and device, a storage medium and electronic equipment, and the method comprises the steps: obtaining a logic diagram executed by a to-be-laid-out chip and an equipment list corresponding to the to-be-laid-out chip; determining a layout diagram of the chip to be laid out based on the logic diagram and the equipment list by utilizing a pre-trained layout model, wherein the layout diagram at least comprises the placement position of each piece of equipment in the chip to be laid out. The pre-trained layout model is used for carrying out chip layout, thelayout diagram of the to-be-laid-out chip can be rapidly obtained through the logic diagram and the equipment list, compared with manual chip layout, the method has the advantages that the consumed time is greatly shortened, and the chip layout efficiency is improved; and moreover, the trained layout model is used for carrying out a large number of machine operations, and compared with manual calculation, the method is high in accuracy, i.e., improves the accuracy of chip layout.

Description

technical field [0001] The present disclosure relates to the technical field of chip design, and in particular, to a chip layout method, device, storage medium and electronic equipment. Background technique [0002] A chip refers to a silicon chip containing an integrated circuit; it is often used as a part of a computer or other electronic equipment due to its low power consumption, small size, and fast operating speed. In the process of producing chips, chip layout is a complex and time-consuming task, because the process involves integrated circuit logic and various devices that implement circuit logic, and it also needs to take into account device attributes and circuit design principles. [0003] At present, professionals who design chips carry out multiple trials, error checking, corrections, and retests based on known logic diagrams to place each device on a certain position on the silicon chip, and then complete the chip layout. Manual layout not only consumes a lon...

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Application Information

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IPC IPC(8): G06F30/392G06F30/394G06F30/398G06K9/62G06N3/04G06N3/08
CPCG06F30/392G06F30/394G06F30/398G06N3/08G06N3/045G06F18/24G06F30/27G06N3/044G06N20/00
Inventor 姜倩文张浩陈丽莉韩鹏何惠东石娟娟
Owner BOE TECH GRP CO LTD
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