A kind of satellite load fpga with bram and using method thereof

Abstract

The present invention provides a kind of satellite load FPGA with BRAM and using method thereof, described satellite load FPGA comprises: internal algorithm module, three-mode voting module, BRAM and self-refresh module, described internal algorithm module, its input is through three-mode The correct output data after the voting module is used to process the satellite load FPGA configuration item; the three-mode voting module obtains the data output by the three-mode BRAM, and performs three-mode redundant voting; the BRAM and the self-refresh module , for storing on-track parameters and controlling the self-refresh of the on-track parameters. According to the satellite payload FPGA of the present invention, the self-refresh function of the BRAM can be completed without the intervention of an external processor, which can solve the problems of the traditional BRAM anti-radiation hardening method that consumes a lot of resources and the risk of processor access conflicts. Solved the problem that the BRAM caused the satellite payload FPGA data to be wrong due to the accumulation of single event flips.

Description

technical field [0001] The invention relates to the field of FPGA space reliability, in particular to a satellite load FPGA with BRAM and a method for using the same. Background technique [0002] SRAM-type FPGA contains rich BRAM storage resources. It is the most commonly used IP core in onboard FPGA configuration items. It is widely used in data cache and parameter storage. It can realize functions such as single-port memory, dual-port memory, and FIFO. BRAM has the highest probability of single event occurrence in the on-board FPGA user logic, accounting for 2.9%. However, since the data stored in BRAM is always in dynamic application, it is difficult to realize the timing refresh design of similar configuration data. Therefore, it is difficult to eliminate the single event upset accumulated in BRAM. [0003] The spatial single event effects of SRAM FPGA can be mainly divided into three categories: configuration memory flipping, user logic flipping, and control unit flip...

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Problems solved by technology

[0008] In order to solve the above-mentioned technical problems, the present invention proposes a satellite load FPGA with BRAM and its use method, in order to solve the BRAM used for data storage and parameter storage in the prior art because the accumulation of single event flipping is difficult to eliminate the satellite load The problem of FPGA data error

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