Satellite load FPGA with BRAM and use method thereof

Abstract

The invention provides a satellite load FPGA with a BRAM and a use method thereof, the satellite load FPGA comprises: an internal algorithm module, a three-mode voting module, the BRAM and a self-refreshing module; the input of the internal algorithm module is correct output data after passing through the three-mode voting module, and the internal algorithm module is used for processing configuration items of the satellite load FPGA; the three-mode voting module is used for acquiring data output by the three-mode BRAM and carrying out three-mode redundancy voting; and the BRAM and the self-refreshing module is used for storing on-orbit parameters and controlling self-refreshing of the on-orbit parameters. According to the satellite load FPGA, the self-refreshing function of the BRAM can be completed without intervention of an external processor, and the problems that a traditional BRAM anti-radiation reinforcement method consumes more resources, and the access conflict risk of the processor is caused can be solved. The problem of satellite load FPGA data errors caused by accumulation of single event upset of the BRAM is solved.

Description

technical field [0001] The invention relates to the field of FPGA space reliability, in particular to a satellite load FPGA with BRAM and a method for using the same. Background technique [0002] SRAM-type FPGA contains rich BRAM storage resources. It is the most commonly used IP core in onboard FPGA configuration items. It is widely used in data cache and parameter storage. It can realize functions such as single-port memory, dual-port memory, and FIFO. BRAM has the highest probability of single event occurrence in the on-board FPGA user logic, accounting for 2.9%. However, since the data stored in BRAM is always in dynamic application, it is difficult to realize the timing refresh design of similar configuration data. Therefore, it is difficult to eliminate the single event upset accumulated in BRAM. [0003] The spatial single event effects of SRAM FPGA can be mainly divided into three categories: configuration memory flipping, user logic flipping, and control unit flip...

AI Technical Summary

Problems solved by technology

[0008] In order to solve the above-mentioned technical problems, the present invention proposes a satellite load FPGA with BRAM and its use method, in order to solve the BRAM used for data storage and parameter storage in the prior art because the accumulation of single event flipping is difficult to eliminate the satellite load The problem of FPGA data error

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