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A display panel with integrated gate drive circuit in display area

An integrated gate drive and gate drive technology, applied in static indicators, identification devices, instruments, etc., can solve problems such as data line interference

Active Publication Date: 2022-07-12
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the problem that when the gate driving signal line and the data line are arranged side by side between the same two adjacent columns of sub-pixels, the data line is easily interfered by the gate driving signal line parallel to it, the embodiment of the present application provides a display area A display panel with an integrated gate drive circuit, the display panel includes sub-pixels arranged in the display area, and gate lines, data lines and gate drive signal lines for driving the sub-pixels, the data lines and the The gate driving signal lines are arranged perpendicular to the gate lines; wherein, the gate driving signal lines are connected to the gate lines, and it is characterized in that the gate driving signal lines are arranged on the same side as the gate driving signal lines. between two columns of subpixels adjacent to the line, the data line is arranged between the two columns of subpixels adjacent to the data line, and only the One of the gate drive signal line and the data line, so that the gate drive signal line and the data line are not arranged side by side between any same two adjacent columns of the sub-pixels

Method used

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  • A display panel with integrated gate drive circuit in display area
  • A display panel with integrated gate drive circuit in display area
  • A display panel with integrated gate drive circuit in display area

Examples

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Embodiment 1

[0049] If the display panel provided in the embodiment of the present application is a 1-to-2 multiplexed display panel, image 3 The position distribution diagram of the sub-pixels, data lines and gate driving signal lines of the 1-to-2 multiplexed display panel according to the embodiment of the present application, Image 6 The circuit connection diagram of the data lines of the 1-to-2 multiplexed display panel provided by the embodiment of the present application is represented by Image 6 can be seen correspondingly image 3 The actual demux circuit connections in the data lines.

[0050] like image 3 As shown, the 1-to-2 multiplexing display panel includes a plurality of sequentially arranged first repeating units 101, and each first repeating unit 101 includes two groups of periodically arranged red, green and blue sub-pixels, and each sub-pixel corresponds to data lines, and at least two gate drive signal lines corresponding to each group of red, green and blue sub-p...

Embodiment 2

[0060] If the display panel provided in the embodiment of the present application is a 1-to-3 multiplexed display panel, Figure 7 The position distribution diagram of the sub-pixels, data lines, and gate driving signal lines of the 1-to-3 multiplexed display panel provided in the embodiment of the present application, Figure 8 The circuit connection diagram of the data lines of the 1-to-3 multiplexed display panel according to the embodiment of the present application is shown by Figure 8 can be seen correspondingly Figure 7 The actual demux circuit connections in the data lines.

[0061] like Figure 7 As shown, the 1-to-3 multiplexing display panel includes a plurality of second repeating units 102 arranged in sequence, and each second repeating unit 102 includes two groups of periodically arranged red, green and blue sub-pixels, and each sub-pixel corresponds to data lines, and at least two gate drive signal lines corresponding to each group of red, green and blue su...

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Abstract

The present application provides a display panel with an integrated gate driving circuit in a display area. The display panel combines a single data line, or a single gate driving signal line, or a data line and a data line side by side, or a gate driving signal line and a gate driving signal line. The gate driving signal lines are arranged side by side between any identical adjacent two columns of sub-pixels, so that the gate driving signal lines and data lines are not arranged side by side between any identical adjacent two columns of sub-pixels, and the integrated gate in the display area is avoided. When the display panel of the drive circuit draws the gate drive circuit out of the display area in order to further reduce the frame of the display panel, there may be a possibility that the data line and the gate drive signal line are arranged side by side between any two adjacent sub-pixels in the same row, and the data The line is easily interfered by the parasitic capacitance generated between the gate driving signal line, resulting in unstable data voltage maintained when the pixel corresponding to the new data line performs image display, and the display panel has a problem of abnormal picture.

Description

technical field [0001] The present application relates to the field of display technology, and in particular, to a display panel with integrated gate driving circuit in a display area. Background technique [0002] Current gate drive circuits, such as GOA (Gate Driven on Array) circuits are mainly designed on one or both sides of the display panel. With the continuous development of full-screen mobile phones, and in the face of When the application shapes of display panels such as vehicles are more diverse and complex, the frame of the display panel is required to be narrower and narrower, and when the width of the gate drive circuit cannot be compressed, the frame of the display panel cannot be reduced. Based on this defect, researchers have proposed the GIA (Gate Driven in Array) technology, that is, the technology of integrating gate drive circuits in the display area of ​​the display panel. Directly lead out from the display area of ​​the display panel, which can furthe...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09F9/30G09G3/20
CPCG09F9/30G09G3/20G09G2300/0426G09G2310/0297G09G2300/0452G09G3/3266G09G2300/0408G09G2310/0267
Inventor 田超
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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