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Neural network design and optimization method based on software and hardware joint learning

A neural network and optimization method technology, applied in the field of neural network architecture search, can solve the problems of increased parameters, low efficiency, difficult design, etc., to achieve the effect of precision and speed balance, high precision and speed

Pending Publication Date: 2022-01-07
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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AI Technical Summary

Problems solved by technology

This design approach is inefficient and it is difficult to design a network that far outperforms existing advanced networks
Moreover, there are many structural parameters that can be adjusted by the neural network, and there is no unified design rule. If different task scenarios and operating equipment are considered, the parameters to be considered will further increase

Method used

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  • Neural network design and optimization method based on software and hardware joint learning
  • Neural network design and optimization method based on software and hardware joint learning
  • Neural network design and optimization method based on software and hardware joint learning

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Embodiment Construction

[0027] The specific implementation manner and working principle of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0028] Aiming at the three major problems of the neural network structure search, the search space is too large, the time cost and calculation consumption of the search are huge, and the software and hardware design separation caused by the lack of FPGA information, a neural network design and optimization method based on software and hardware joint learning is proposed. This method uses the method of joint learning of software and hardware to search and optimize the neural network, and specifically includes the following steps:

[0029] S1) Statistics on neural network structure rules: Discuss the relationship between the number of nodes, the number of structural blocks, the number of channels, the resolution of input images, the amount of parameters, etc. Regularity of resolution and width.

[003...

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Abstract

The invention discloses a neural network design and optimization method based on software and hardware joint learning. The method comprises the following steps: counting a neural network structure rule; carrying out FPGA hardware characteristic prediction; designing an FPGA neural network structure space; and applying a software and hardware joint learning method in a search space, and by combining random search and block supervised search, obtaining a trunk neural network. Based on the design characteristics of the neural network and the hardware characteristics of the FPGA, a search space with prior information is constructed, which is the direction of search establishment; and meanwhile, by combining random search and block supervised search with FPGA model prediction, an efficient neural network model with precision and speed balance is obtained. According to the model, the Top-1 accuracy rate of 77.2% and the speed of 327.67 FPS on an ImageNet data set are achieved on the aspect of ZCU102.

Description

technical field [0001] The invention relates to the technical field of neural network architecture search, in particular to a neural network design and optimization method based on joint learning of software and hardware. Background technique [0002] In the target detection task of autonomous driving, the backbone neural network of the detector undertakes the main feature extraction task, and largely determines the accuracy and speed of the overall detection task. Therefore, it is critical to design a backbone neural network suitable for autonomous driving tasks. [0003] Manually designing neural networks requires solid professional knowledge and a lot of labor, and a new architecture is usually modified from some existing networks through carefully designed manual experiments. This design approach is inefficient and it is difficult to design a network that far exceeds existing advanced networks. Moreover, there are many structural parameters that can be adjusted by the ...

Claims

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Application Information

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IPC IPC(8): G06N3/04G06N3/063
CPCG06N3/063G06N3/045Y02D10/00
Inventor 李曙光薛飞欧俊宏王海程洪
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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