This invention relates to the field of integrated circuits, specifically to a time residual
processing circuit, a correlation multiple sampling method, an SS-ADC circuit, and a
chip. The time residual
processing circuit extracts the residual
signal from the quantization result based on the output of the
comparator in the SS-ADC and completes the quantization of the time residual. The time residual
processing circuit consists of a D flip-flop, an
NOR gate, two resistors of the same value, four NMOS transistors, two capacitors of different values, and a
comparator. A charging and discharging channel formed by the two capacitors is used to perform a rate-multiplication of the pulse width of the residual
signal. The proposed correlation multiple sampling method and its circuit adjust the ramp
signal type and the number of repeated samplings based on the
light intensity of the input signal during the pixel signal quantization stage, and quantize the time residual of the process to correct the
comparator output. This invention solves the problems of insufficient accuracy and high
power consumption of the SS-ADC used in existing CIS circuits.