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Apparatus for realizing ethernet VDSL access in ATM-DSLAM

An Ethernet and on-site technology, applied in the branch office to provide special service devices, selection devices, data exchange networks, etc., can solve the problems of slowing down the development of ATM networks

Inactive Publication Date: 2009-09-23
ZTE CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the development speed of ATM network has slowed down, it will still exist for a long time, and has irreplaceable advantages in end-to-end Qos (Quality of Service) guarantee and multi-service bearing

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  • Apparatus for realizing ethernet VDSL access in ATM-DSLAM
  • Apparatus for realizing ethernet VDSL access in ATM-DSLAM
  • Apparatus for realizing ethernet VDSL access in ATM-DSLAM

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Embodiment Construction

[0019] Ethernet VDSL access is realized through the cooperation of VDSL user boards and ATM DSLAM products. Taking the ZXDSL 8220 system of ZTE Corporation as an example, the ZXDSL 8220 is an ATM DSLAM product. The system mainly includes uplink boards, Core board and user board. The function of the VDSL user board is to complete the user interface and uplink aggregation of the VDSL system based on the Infineon solution. From the perspective of the uplink solution, it is no different from the general ADSL user board, but because the VDSL system of the Infineon solution is commonly used based on IP, so in this implementation, an FPGA is used inside the single board to realize the Ethernet interface ( SMII) to ATM interface (UTOPIA) conversion.

[0020] Such as figure 1 Shown is the connection diagram of each functional module of the VDSL subscriber board. The DSL user board includes: a multiplexing chip 3 , a VDSL chip set 1 , an FPGA field programmable gate array 2 , a CPU p...

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Abstract

The invention discloses a device for realizing Ethernet VDSL access in an ATM DSLAM. The device includes: a multiplexing chip, a VDSL chip set, an FPGA device, a CPU, a power supply module, a clock generation and a driving module; the multiplexing chip passes UTOPIA The interface and the microprocessor interface are respectively connected to the FPGA device and the CPU; the VDSL chip is respectively connected to the FPGA device and the CPU through the SMII interface and the microprocessor interface; the FPGA device is used to convert the Ethernet data packet segmentation into ATM cells and Form ATM cells into Ethernet packets for full-duplex data transmission, and perform static binding of the physical layer ID of the SMII interface and the UTOPIA interface; the CPU is used to control and manage the VDSL set of chips and the FPGA device multiplexing chip; the power supply module Different voltage values ​​are generated by level conversion for power supply, and the clock generation and driving module is used to generate the corresponding clock signals required. Adopting the device can realize mixed insertion of ADSL and VDSL access modes in the ATM DSLAM system.

Description

technical field [0001] The invention relates to a device for data communication using DSL digital subscriber loop, in particular to a device for realizing Ethernet VDSL access in ATM DSLAM. Background technique [0002] As DSL (Digital Subscriber Loop, Digital Subscriber Loop) technology, especially ADSL (Asymmetrical Digital Subscriber Loop, Asymmetrical Digital Subscriber Loop) technology, has been continuously recognized by users and telecom operators, DSLAM (Digital Subscriber Line Access Multiplexer, The construction of digital subscriber line access multiplexer) has really become a hot spot in broadband construction in the past two years. The traditional DSLAM network side interface generally adopts ATM (Asynchronous Transfer Mode, asynchronous transfer mode) interface, which is more suitable for telecom operators with ATM metropolitan area network. This kind of DSLAM based on ATM architecture is ATM DSLAM. [0003] VDSL (Very high-speed Digital Subscriber Loop, very...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/28H04L12/24H04L12/26H04L12/16H04Q3/00H04Q3/545
Inventor 孟雄斌陈多磊成剑波
Owner ZTE CORP