Method for realizing high voltage frequency transformer main control system by built-in dual-port RAM of FPGA

Abstract

The invention relates to a method for realizing a high-pressure transducer main controlling system by internally embedding a dual-port RAM in an FPGA. The main controlling system comprises a main control chip and the FPGA. A control module, a monitoring module and the dual-port RAM are internally integrated in the FPGA; the main control chip is in charge of providing external operation-interfacesfor monitoring the integral running state of a transducer, and a core control logic of high voltage variable frequency; and all power units are controlled and monitored through FPGA. The method for realizing the high-pressure transducer main controlling system has the advantages of simple system, high reliability and good action synchronicity of all units, etc., lowers the cost at the same time, and simplifies the interaction between the main control chip and the FPGA.

Description

technical field [0001] The present invention relates to the field of high-voltage frequency converters realized by the power unit series scheme, and mainly proposes a main control chip (which can be one or multiple other CPUs) and an FPGA chip for monitoring each power unit. The main control system to realize the core control scheme of the high-voltage inverter. Among them, on the one hand, FPGA exists as the unit monitoring and control part of the entire main control system, on the other hand, it also performs some logic processing with strong real-time performance, and also uses internal resources to build dual-port RAM to realize the communication with the main control CPU. communication. Background technique [0002] As my country pays more and more attention to energy saving, the field of energy saving of high-voltage motors, which accounts for more than half of the total power of induction motors in my country, has more and more broad prospects. The most significant ...

AI Technical Summary

Problems solved by technology

The disadvantages of the current scheme are as follows: one is the high cost

Each peripheral control unit is composed of a large number of chips and circuits, so the cost is very high

Second, low reliability

High failure rate

Third, poor synchronization

Therefore, although the control signals sent to each unit can achieve good synchronization on the control chip side, but when it comes to the processing of the peripheral control unit, the synchronization will become very poor due to the difference in the clock and the difference in the current processing content.

Fourth, the communication between the control chip and each peripheral control unit is complicated

And the processing of the control chip will be very complicated

If the control chip adopts the method of storage expansion, a large amount of memory needs to be expanded, which increases the cost on the one hand and further reduces the reliability on the other hand

Fifth, the burden on the main control chip is heavy

If this part of the processing is also handed over to the main control chip for processing, it will greatly increase the burden on the main control chip

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