On-chip network data transmission device and method with cascade protection function
A data transmission device and network-on-chip technology, applied in digital transmission systems, transmission systems, data exchange networks, etc., can solve problems such as affecting the transmission performance of the on-chip network, high router cache overhead, and increased transmission power consumption, and reduce transmission delays. and power overhead, reducing latency and power overhead, reducing the effect of frequent operations
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[0037] figure 2 It is the structural diagram of the head protection unit. The header protection unit includes three sampling modules, a first-in-first-out cache and a majority voting module to protect the packet header:
[0038] The three-time sampling module includes three registers (R1, R2, R3), two multiplexers (MUX1, MUX2), and three-time sampling controllers, and the three registers R1, R2, R3 are all connected to the first multiplexer The selector MUX1 is connected, the first multiplexer MUX1 is connected with the second multiplexer MUX2, the first register R1 directly adopts the chip clock signal clk, and the second register R2 adopts the chip clock signal clk through the first small delay element ( figure 2 The clock signal after δ) in , the third register R3 adopts the clock signal after the chip clock signal clk passes through the first small delay element and the second small delay element. The small delay element is composed of two inverters connected in serie...
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