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An Integer Domain Chaotic Circuit

A technology of chaotic circuits and integers, which is applied in the field of chaotic circuits in the integer domain, can solve problems such as rounding errors, and achieve the effect of solving dynamic degradation problems

Active Publication Date: 2017-07-25
GUANGDONG UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since all operations (iterations) are carried out on the real number field, when implemented by computers or digital devices, the limitation of word length will inevitably lead to finite precision effects. In addition, continuous chaos needs to be transformed into a chaotic sequence. This transformation is also will introduce rounding errors

Method used

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  • An Integer Domain Chaotic Circuit
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Embodiment Construction

[0021] The technical solution of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments, so as to understand the essence of the present invention more clearly and intuitively.

[0022] like figure 1 As shown, the embodiment of the present invention provides an integer domain chaotic circuit, including a uniform noise signal generation circuit (N1), a sample and hold circuit (N2), a decoding circuit (N3), an iterative circuit (N4), and a D / A conversion The five parts of the circuit (N5) generate chaotic signals in the integer domain with 16 digital symbols of 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, and 15 , and its connection relationship is:

[0023] (1) The output terminal A of the uniform noise signal generating circuit (N1) is connected to the input terminal B of the sample and hold circuit (N2);

[0024] (2) The output terminal C of the sample-and-hold circuit (N2) is respectively connected...

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Abstract

The invention discloses an integer field chaotic circuit which comprises a uniform noise signal generation circuit (N1), a sample hold circuit (N2), a decoding circuit (N3), an iteration circuit (N4) and a D / A converting circuit (N5) five components. The output end A of the uniform noise signal generation circuit (N1) is connected with the input end B of the sample hold circuit (N2); the output end C of the sample hold circuit (N2) is connected with the four input ends D0, D1, D2, and D3 of the decoding circuit (N3); the output end E0 of the decoding circuit (N3) is connected with the input end of an XOR0 of the iteration circuit (N4), the output end E1 is connected with the input end of an XOR1, the output end E2 is connected with the input end of an XOR2, and the output end E3 is connected with the input end of an XOR3; the output ends of the XOR0, the XOR1, the XOR2 and the XOR3 of the iteration circuit (N4) are connected with the input end of a DAC1 of the D / A converting circuit (N5); and the input ends of the XOR0, the XOR1, the XOR2 and the XOR3 of the iteration circuit (N4) are connected with the input end of a DAC2 of the D / A converting circuit (N5). The integer field chaotic circuit essentially solves the problem of dynamics degeneration due to limited precision effect.

Description

technical field [0001] The present invention relates to circuits, in particular to chaotic circuits, specifically to an integer domain chaotic circuit, by adjusting the decoding circuit N 3 When the comparison voltages of the four comparators Comparator0, Comparator1, Comparator2, and Comparator3 meet 0V, 1V, 2V, and 3V respectively, the circuit generates 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 , 11, 12, 13, 14, 15 are chaotic signals in the integer domain with 16 digital symbols in total. It can be used not only for encryption and decryption of video signals and digital watermarks, but also as an independent chaotic signal generator, providing a new integer domain chaotic signal source. Background technique [0002] In chaotic encryption, information security mainly depends on whether the generated chaotic system has good statistical test properties. However, the current chaotic system is based on the real number field operation, which belongs to the real number field chaotic sy...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L9/00
Inventor 王倩雪禹思敏吕金虎郑汉忠
Owner GUANGDONG UNIV OF TECH
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