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Semiconductor device

A semiconductor, conductive type technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of reduced latch-up tolerance of power transistors and increased loss of power transistors

Active Publication Date: 2015-03-18
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the barrier layer has problems such as difficulty in the passage of holes and generation of penetration resistance (Japanese: もぐり resistance) when holes pass through, which leads to an increase in the loss of the power transistor when it is turned off, and the latch-up of the power transistor decreased tolerance

Method used

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  • Semiconductor device
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no. 1 Embodiment approach ）

[0016] FIG. 1 is a plan view and a cross-sectional view showing the structure of the semiconductor device of the first embodiment. FIG. 2 is a perspective view showing the structure of the semiconductor device according to the first embodiment and its modification. The semiconductor device of this embodiment includes a trench IGBT as a power transistor.

[0017] FIG. 1(a) is a plan view showing the structure of the semiconductor device of the present embodiment, and FIG. 1(b) and FIG. 1(c) are respectively shown along the II' line and J- shown in FIG. 1(a). Sectional view of line J'. In addition, Fig. 1(a) corresponds to a plan view along the plane K shown in Figs. 1(b) and 1(c).

[0018] 2(a) is a perspective view showing the structure of the semiconductor device of this embodiment, and FIG. 2(b) is a perspective view showing the structure of the semiconductor device of a modification of this embodiment. For the convenience of description, FIGS. 2(a) and 2(b) show only a part o...

no. 2 Embodiment approach ）

[0057] Image 6 It is a cross-sectional view showing the structure of the semiconductor device of the second embodiment.

[0058] Image 6 As in Fig. 1(b), it is a cross-sectional view along the line II' shown in Fig. 1(a). Hereinafter, the semiconductor device of the second embodiment will be described, and the description of the matters common to the first embodiment and the second embodiment will be omitted.

[0059] The barrier layer 17 of this embodiment is the same as the barrier layer 17 of the first embodiment, and is formed on the first foundation layer 11 side of the second foundation layer 12.

[0060] However, the barrier layer 17 of this embodiment is different from the barrier layer 17 of the first embodiment in that it extends in the Y direction between the respective gate electrodes 19.

[0061] Reference numeral 17a denotes the first region of the barrier layer 17 and is located directly under the emitter layer 13. Reference numeral 17b denotes the second region of t...

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Abstract

In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type having first and second faces, and a second semiconductor layer of a second conductivity type disposed above the first face of the first semiconductor layer. The device further includes control electrodes facing the first and second semiconductor layers via insulating layers, and extending to a first direction parallel to the first face of the first semiconductor layer, and third semiconductor layers of the first conductivity type and fourth semiconductor layers of the second conductivity type alternately disposed along the first direction above the second semiconductor layer. The device further includes fifth semiconductor layers of the first conductivity type disposed below the second semiconductor layer or disposed at positions surrounded by the second semiconductor layer, the fifth semiconductor layers being arranged separately from one another along the first direction.

Description

[0001] Related application [0002] This application enjoys priority based on Japanese Patent Application No. 2013-185612 (application date: September 6, 2013). This application includes all the contents of the basic application by referring to the basic application. Technical field [0003] Embodiments of the present invention relate to semiconductor devices. Background technique [0004] In power transistors such as trench IGBT (Insulated Gate Bipolar Transistor), in order to improve the IE effect (carrier injection promotion effect), a barrier layer may be formed under the emitter layer and the contact layer between the trenches. . However, the barrier layer has problems such as difficulty for holes to pass through, and generation of latent permeability resistance (Japanese: もぐり resistance) when holes pass, which leads to an increase in the loss when the power transistor is turned off and the blocking of the power transistor. Reduced tolerance. Summary of the invention [0005...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/739H01L29/06
CPCH01L29/7395H01L29/0834H01L29/1095H01L29/7397
Inventor 原琢磨中村和敏小仓常雄
Owner KK TOSHIBA