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Instruction branch prediction method and system

A branch prediction and instruction technology, which is applied to concurrent instruction execution, machine execution devices, etc., can solve the problems of the processor without instruction branch prediction function, the reduction of processor execution efficiency, and the stall of the processor pipeline, so as to solve the problem of the processor pipeline stall. , to eliminate the effect of reducing processor execution efficiency

Active Publication Date: 2015-07-22
SHENZHEN CHIPSBANK TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, small-scale processors do not have instruction branch prediction function or only have unidirectional static branch prediction function. If there is a jump instruction in a non-sequential execution direction, the processor pipeline will stall, which will lead to the insertion of branch delay gaps and reduce the execution efficiency of the processor.

Method used

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  • Instruction branch prediction method and system

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Embodiment Construction

[0031] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0032] The invention provides an instruction branch prediction method, figure 1 A flow chart of Embodiment 1 of the instruction branch prediction method of the present invention is shown, including:

[0033] Step S101: Execute the current instruction, obtain and cache a preset number of instructions to be executed in the sequential execution direction;

[0034] Take the instruction being executed by the processor as the reference point, take the sequential ex...

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PUM

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Abstract

The invention discloses an instruction branch prediction method and system. After a current instruction is executed, instructions of a preset number to be executed in a sequential executing direction are obtained and cached, whether the first cached instruction is of a jump instruction type or not is judged, and if yes, a jump target address is calculated, and a target jump instruction is cached; when a jump condition is met, cache of the target jump instruction is directly read, the jump instruction can be executed, and if the jump condition cannot be met, the second cached instruction in the sequential executing direction is directly read; when the jump instruction is executed, due to the fact that the subsequent instructions to be executed are all obtained and can be directly read, cached and executed no matter whether the jump condition is met or not, bidirectional instruction branch prediction is achieved in a jump instruction prejudgment, instruction pre-taking, instruction cache and direct reading and caching mode, processor assembly line pauses caused by the jump instruction are eliminated, and the situation that the executing efficiency of a processor is reduced due to the fact that the processor is inserted into a branch delay clearance is avoided.

Description

technical field [0001] The invention relates to the field of processors, in particular to an instruction branch prediction method and system. Background technique [0002] When a processor with pipeline technology processes a branch instruction, depending on the true / false of the judgment condition, a jump may occur, which will interrupt the processing of the instruction in the pipeline, because the processor cannot determine the next step of the instruction. instructions until the branch is executed. The longer the pipeline, the longer the processor waits, because it must wait for the branch instruction to be processed before it can determine the next instruction to enter the pipeline. [0003] At present, small-scale processors do not have instruction branch prediction function or only have unidirectional static branch prediction function. If there is a jump instruction in a non-sequential execution direction, the processor pipeline will stall, which will lead to the inse...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38
Inventor 谢长华
Owner SHENZHEN CHIPSBANK TECH
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