A Multi-Channel Signal Output System with Increased Transmission Rate
A signal output, multi-channel technology, applied in the direction of transmission system, digital transmission system, modulated carrier system, etc., can solve the problem of low transmission rate and achieve the effect of improving the transmission rate
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specific Embodiment approach 1
[0025] Specific implementation manner 1: A multi-channel 2FSK modulation method for improving the transmission rate of this implementation manner is implemented in the following steps:
[0026] 1. Use the multi-channel signal output system as the hardware platform to set the parameters of the symbol sequence;
[0027] Wherein, the parameters of the symbol sequence include symbol sequence A, symbol sequence B, the number of symbols in the symbol sequence, code width, frequency control word 1 and frequency control word 2;
[0028] 2. Two sinusoidal carriers with different frequencies and different amplitudes are generated according to the set parameters, and the symbol sequence is transmitted; wherein each symbol sequence has "00", "01", "10", and "11". 4 values;
[0029] 3. Channel switching by setting a multiplexer, and time-sharing multi-channel 2FSK modulation.
specific Embodiment approach 2
[0030] Specific embodiment two: This embodiment is different from specific embodiment one in: a multi-channel signal output system that improves the transmission rate. The multi-channel signal output system consists of a power supply module, an FPGA module, a configuration module, a clock management module, and a DAC. Module, analog switch module, PCI bus and external interface composition;
[0031] Wherein, the power supply module supplies power for the system;
[0032] The FPGA module is used as the master controller to realize the functions of each internal unit, simultaneously control the DAC module and the clock management module, realize 2FSK modulation, and control the analog switch module to realize multi-channel switching;
[0033] The configuration module implements the configuration of the FPGA module;
[0034] The clock management module includes a crystal oscillator and a clock distributor. The clock distributor generates a high-quality, low-jitter clock signal for the DA...
specific Embodiment approach 3
[0038] Specific embodiment three: this embodiment is different from specific embodiment one or two in that the FPGA module includes a DAC control unit, a DAC clock configuration unit, a 2FSK modulation unit, a PCI decoding unit, and an analog switch control unit;
[0039] Wherein, the PCI decoding unit decodes the address and corresponding data on the PCI bus, and writes the data into each register for use by the 2FSK modulation unit and the analog switch control unit;
[0040] The 2FSK modulation unit implements 2FSK modulation;
[0041] The DAC control unit realizes the control of the DAC module, and uses the modulated data for the DAC module;
[0042] The DAC clock configuration unit controls the clock distributor in the clock management module to generate a high-quality clock for use by the DAC module.
[0043] Other steps and parameters are the same as those in the first or second embodiment.
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