Multichannel 2FSK modulation method and multichannel signal output system improving signaling rate
A 2FSK, signal output technology, applied in the field of multi-channel signal output system, can solve the problem of low transmission rate and achieve the effect of increasing transmission rate
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specific Embodiment approach 1
[0025] Embodiment 1: A multi-channel 2FSK modulation method for improving the signal transmission rate of this embodiment is implemented according to the following steps:
[0026] 1. Using the multi-channel signal output system as the hardware platform, set the parameters of the symbol sequence;
[0027] Wherein, the parameters of the symbol sequence include symbol sequence A, symbol sequence B, the number of symbols in the symbol sequence, code width, frequency control word 1 and frequency control word 2;
[0028] 2. Generate two sinusoidal carriers with different frequencies and different amplitudes according to the set parameters, and transmit the symbol sequence; wherein, each symbol sequence has a total of "00", "01", "10", and "11". 4 values;
[0029] 3. Channel switching is performed by setting the multiplexer, and multi-channel 2FSK modulation is performed in time division.
specific Embodiment approach 2
[0030] Embodiment 2: The difference between this embodiment and Embodiment 1 is: a multi-channel signal output system that improves the signal transmission rate. The multi-channel signal output system consists of a power supply module, an FPGA module, a configuration module, a clock management module, and a DAC. Module, analog switch module, PCI bus and external interface;
[0031] Wherein, the power module supplies power to the system;
[0032] The FPGA module is used as the main controller to realize the functions of each internal unit, control the DAC module and the clock management module at the same time, realize 2FSK modulation, and control the analog switch module to realize multi-channel switching;
[0033] The configuration module realizes the configuration of the FPGA module;
[0034] The clock management module includes a crystal oscillator and a clock distributor, and generates a high-quality, low-jitter clock signal through the clock distributor for use by the DA...
specific Embodiment approach 3
[0038] Embodiment 3: This embodiment is different from Embodiment 1 or 2 in that: the FPGA module includes a DAC control unit, a DAC clock configuration unit, a 2FSK modulation unit, a PCI decoding unit, and an analog switch control unit;
[0039] Wherein, the PCI decoding unit decodes the address on the PCI bus and the corresponding data, and writes the data into each register for use by the 2FSK modulation unit and the analog switch module;
[0040] The 2FSK modulation unit realizes 2FSK modulation;
[0041] The DAC control unit realizes the control of the DAC module, and provides the modulated data for the DAC module to use;
[0042] The DAC clock configuration unit controls the clock distributor in the clock management module to generate a high-quality clock for the DAC module to use.
[0043] Other steps and parameters are the same as in the first or second embodiment.
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