Tag insertion based inter-core cooperation multi-thread PMU event monitoring method
A plug-in label and multi-threading technology, applied in the computer field, can solve the problems of not reflecting the performance of the processor, complex communication, etc.
Active Publication Date: 2016-03-23
JIANGNAN INST OF COMPUTING TECH
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[0006] However, the above-mentioned existing cooperative performance monitoring technology on many-core processors has the following problems: first, due to the respective monitoring, data distribution, and complex communication required for coordination; second, each monitoring point has a certain overhead, a large number of There is a certain overhead in thread simultaneous monitoring
[0007] Specifically, in general, the traditional performance monitoring for single-core and multi-core processors often uses the PMU of each processor core to perform separate performance monitoring, which can only reflect the performance of a certain processor core. Usage efficiency does not reflect the performance usage status of the entire processor. In order to comprehensively reflect the performance of the entire processor, some kind of on-chip data interaction mechanism is needed to aggregate these monitoring data to form an overall unified performance monitoring effect to achieve real and effective monitoring. Reflects the overall performance efficiency of the processor
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[0020] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.
[0021] Heterogeneous many-core processors generally refer to the presence of two processor cores with different functions on the chip. One processor core focuses on computing, has a simple logic design, a large number, and strong peak computing capabilities. It is generally used to accelerate intensive computing, called It is the computing core; a kind of processor core focuses on control and service, with complex logic design and a small number. It is generally used to realize various functional control and service operations, and is called the computing control core.
[0022] Inter-core cooperative multi-threaded PMU event monitoring technology based on instrumentation tags adopts the timing perception mechanism of the control core. The contro...
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The invention provides a tag insertion based inter-core cooperation multi-thread PMU event monitoring method, which is used for a heterogeneous many-core processor. The heterogeneous many-core processor comprises calculation cores used for executing calculation operations and a calculation control core used for executing control and service operations, wherein the calculation control core sets a performance event concerned by a thread running in each calculation core; a PMU of the thread running in each calculation core is initialized; a tag is inserted in the thread running in each calculation core; the calculation control core transparently collects data returned in real time by the tag inserted in the thread running in each calculation core in a background; and the calculation control core intensively arranges and analyzes the returned data to execute a performance monitoring record so as to form unified full-processor performance monitoring.
Description
technical field [0001] The present invention relates to the field of computer technology, and more specifically, the present invention relates to an inter-core cooperative multi-thread PMU event monitoring method based on an inserted tag. Background technique [0002] In order to evaluate their structural design, the designers of the hardware architecture have implanted many hardware performance counters in the processing. This approach also provides the possibility to use hardware support to analyze the performance influencing factors of the program. With the continuous improvement of processor design and performance, most modern processors integrate a special type of hardware performance monitoring unit, namely PMU (performance monitoring unit, called "performance monitoring unit" or "hardware performance counter"), to Collect performance events from the processor. [0003] For example, if an instruction Cache (cache) miss event occurs, the corresponding register of the P...
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IPC IPC(8): G06F11/34
CPCG06F11/3466
Inventor 刘勇彭超陈华蓉王敬宇冯赟龙王雯霞
Owner JIANGNAN INST OF COMPUTING TECH