Film flip chip packaging body and a film packaging substrate

Abstract

The invention discloses a film flip chip packaging body. The film flip chip packaging body comprises a flexible substrate, a plurality of conductive lines, a chip, at least one insultion currentguiding pin and a packaging colloid. The flexible substrate has a chip connection area; a plurality of leads are arranged on the flexible substrate; each lead has an inner terminal extending to the chip connection area; the chip is arranged in the chip connection area and is electrically connected through a plurality of projection blocks and the inner connection terminals; at least one insulation current guiding pin is arranged on the flexible ubstrate and is arranged between two adjacent leads; the insulation current guiding pin has a first terminal; compared with the inner connection terminal, the first terrinal is cloer to the middle portion of the connection area of the chip; the packaging colloid at least filled between the chip and the flexible substrate; and, through the insulation current guiding pin, the packaging colloid can be filled between the chip and the flexible substrate more smoothly.

Description

technical field [0001] The present invention relates to a film-on-chip package and a film-packaged substrate, and in particular, the present invention relates to a film-on-chip package and a film-packaged package that can make the encapsulant more smoothly filled between the chip and the flexible substrate. substrate. Background technique [0002] Chip On Film (COF) packaging structure is a technology for packaging chips on flexible substrates or soft substrates, and is generally used in the packaging of driver ICs in liquid crystal displays. [0003] see figure 1 , figure 1 A cross-sectional view of a conventional thin film chip-on-chip package 1 is shown. Such as figure 1 As shown, the chip-on-film package 1 includes a flexible substrate 10 , a plurality of wires 12 , a solder mask 14 , a chip 16 and an encapsulant 18 . The flexible substrate 10 is provided with a chip bonding area 100 on its surface, and a plurality of wires 12 are disposed on the surface of the flex...

AI Technical Summary

Problems solved by technology

[0005] However, due to the demand trend of high pin count and micro-gap, the height of the bumps on the chip 16 is continuously reduced, so that the gap between the chip 16 and the flexible substrate 10 is narrowed, and there is only a small gap between the bumps and the wires 12. The encapsulant 18 must flow from the outer edge of the chip bonding area 100 through the tiny gap between the bumps and the wires 12 to flow into the space between the chip 16 and the flexible substrate 10

The reduction of the channel width causes the flow velocity of the encapsulant 18 to change, and the uneven flow velocity may easily cause turbulence or generate an air trap between the chip 16 and the flexible substrate 10, so that the gas cannot be discharged smoothly, forming such as figure 1 The air bubbles 180 shown stay in the encapsulant 18 , and the bubbles 180 may expand due to temperature rise in the subsequent process, resulting in popcorn phenomena such as delamination and cracks, and even cause the entire thin film chip-on-chip package 1 damaged

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