High-speed collection method based on network-on-chip

A high-speed data acquisition, on-chip network technology, applied in data exchange networks, digital transmission systems, electrical components, etc., can solve problems such as poor scalability, low communication efficiency, and complex design, achieving low chip area overhead and reliable and safe data transmission. , the effect of improving data throughput

Active Publication Date: 2016-12-07
GUILIN UNIV OF ELECTRONIC TECH
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Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a high-speed data acquisition method based on an on-chip network for the problems of poor scalability, low communication efficiency and complex design in the existing bus-based high-speed data acquisition method

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Embodiment Construction

[0037] The present invention will be described below in conjunction with the accompanying drawings and embodiments, but not to limit the content of the present invention.

[0038] A high-speed data acquisition system based on a network on chip, such as figure 1 As shown, it includes on-chip router network, AD data acquisition resource network interface, Ethernet module and NIOS II soft-core module, as well as off-chip AD data acquisition module and upper computer (ie, human-computer interaction interface).

[0039] 1. AD data acquisition module

[0040] The principle of off-chip AD data acquisition module is as follows: figure 2 As shown, each AD data acquisition module includes a signal conditioning circuit and an AD acquisition circuit. The main function of the signal conditioning circuit is to reduce the input voltage according to a certain ratio, so that it meets the requirements of the input voltage range of the AD data acquisition input terminal. The AD acquisition c...

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Abstract

The invention discloses a high-speed collection method based on a network-on-chip. The method comprises the steps that firstly, a human-computer interaction interface sets an AD data collection working mode, initializes modules, determines a calibration parameter, sends a data collection starting command, and so on; secondly, an AD data collection resource network interface module calibrates collected data, encapsulates the calibrated data into data packets and sends the data packets to the network-on-chip, the network-on-chip forwards the data to an Ethernet resource network interface, the Ethernet resource network interface transmits the data to an Ethernet module, and the Ethernet module encapsulates the received data into data frames according to a UDP protocol and sends the data frames to the human-computer interaction interface; and finally the human-computer interaction interface correspondingly processes the data. The method is characterized in high sampling rate, high data transmission efficiency, low resource utilization rate, low power consumption and high expandability.

Description

technical field [0001] The invention relates to the technical field of on-chip networks, in particular to a high-speed data collection method based on on-chip networks. Background technique [0002] In recent years, people pay more and more attention to high-speed data acquisition and its application, and the high-speed data acquisition system has also developed rapidly, and it can be widely used in various fields. With the continuous improvement of the conversion rate and conversion accuracy of A / D converters, integrated circuits supporting high-speed data acquisition have also entered the era of SoC: System on Chip from the previous ASIC (Application Specific Integrated Circuit) era. . The SoC-based high-speed data acquisition system can realize signal acquisition, conversion, storage, processing and I / O functions on a single chip. It integrates digital circuits, memory, MPU, MCU, DSP, etc. on one chip to form a Complete high-speed data acquisition system. However, sinc...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/933H04L29/08H04L29/06
CPCH04L49/109H04L69/164H04L67/5651
Inventor 许川佩赵江伟
Owner GUILIN UNIV OF ELECTRONIC TECH
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