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Method and device for queue management

A queue management and queue technology, applied in the input/output process of data processing, electrical digital data processing, digital transmission system, etc., can solve the problems affecting the efficiency of message queue dequeue

Active Publication Date: 2019-07-19
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The technical problem to be solved by the embodiment of the present invention is to provide a queue control information management method and device, which can solve the problem in the prior art that the limitation of the capacity and bandwidth of the DRAM memory affects the efficiency of message queue dequeueing

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  • Method and device for queue management
  • Method and device for queue management
  • Method and device for queue management

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Embodiment Construction

[0078] The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention.

[0079] Unless otherwise stated, the message queues involved in the embodiments of the present invention may all be FIFO queues. Both the execution subject of the queue management method provided by the embodiment of the present invention and the queue management device may be a memory controller (English: memory controller). For example, memory controller can control DRAM and SRAM. Further, both the execution subject of the queue management method provided by the embodiment of the present invention and the queue management device may be a traffic management chip. The traffic management chip includes the memory controller. For example, the traffic management chip can be coupled with the DRAM through the memory controller. For example, the traffic management chip can be coupled with the SRAM through th...

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Abstract

The embodiment of the present invention discloses a queue management method, including: writing a PD queue into DRAM, the PD queue includes multiple PDs, and the multiple PDs are the same as the multiple messages included in the first message queue One-to-one correspondence: writing at least one PD in the PD queue into the SRAM, where the at least one PD includes a queue head of the PD queue. Correspondingly, the embodiment of the present invention also discloses a queue management device. The above solution helps to improve the dequeue efficiency of the message queue.

Description

technical field [0001] The embodiments of the present invention relate to the communication field, and in particular, to a queue management method and device. Background technique [0002] The increase in network bandwidth requirements puts forward higher requirements on router capacity and integration. The rate of a single line card (English: line card, LC for short) of a router evolves from 10 gigabit per second (English: gigabit per second, Gbps for short), 40Gbps, 100Gbps, 200Gbps to 400Gbps and higher. The processing capacity of a single line card of the router has also evolved from 15 million packets per second (English: mega packet per second, Mpps for short), 60Mpps, 150Mpps, 300Mpps to 600Mpps and higher, which is very important for the line card of the router. The speed of memory presents challenges. [0003] Scheduling the message queue (including message enqueue and message dequeue) can be accessed through the packet descriptor (English: packet descriptor, refe...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/861H04L49/901
CPCH04L47/50H04L49/901G06F3/0604G06F3/0631G06F3/0685
Inventor 陆玉春张健
Owner HUAWEI TECH CO LTD
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