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A norflash read control circuit and method

A read control and circuit technology, applied in the field of norflash read control circuit, can solve the problem of increasing system power consumption and achieve high efficiency

Active Publication Date: 2020-01-31
GREE ELECTRIC APPLIANCES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The reading of norflash requires a pulse trigger signal. At present, the reading control circuit and the CPU are designed with the same frequency. If the highest reading efficiency is to be achieved, the CPU clock cycle must be half of the flash reading time, and the CPU frequency needs to be increased. System Power Consumption

Method used

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  • A norflash read control circuit and method
  • A norflash read control circuit and method
  • A norflash read control circuit and method

Examples

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Embodiment Construction

[0024] The exemplary embodiments will be described in detail here, and examples thereof are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation manners described in the following exemplary embodiments do not represent all implementation manners consistent with the present invention. Rather, they are merely examples of devices and methods consistent with some aspects of the present invention as detailed in the appended claims.

[0025] Before describing the embodiments, it should be noted that, for the convenience and specificity of the description, the embodiments in this group are directed to the norflash read control circuit, but are not limited to the scope of the examples.

[0026] The processors in the following exemplary embodiments are merely exemplary descriptions, and other devices with similar at...

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Abstract

The invention relates to a reading control circuit and method of a norflash. The reading control circuit comprises a gating clock circuit, a delay controller and a data selector, wherein the gating clock circuit is used for generating a reading trigger signal under a low-frequency condition; the delay controller is used for generating a reading trigger signal under a high-frequency condition; an input end of the data selector is connected with output ends of the gating control circuit and of the delay controller, and is used for selectively outputting the reading trigger signals to the norflash. According to the reading control circuit and method of the norflash, a CPU can work at lower frequencies without losing execution efficiency, and the CPU is supported to work at high frequencies at the same time, so that the highest efficiency of flash reading is achieved when the CPU works at different frequencies.

Description

Technical field [0001] The invention relates to a control circuit, in particular to a norflash reading control circuit and method. Background technique [0002] IOT technology is advancing by leaps and bounds. As the core device of IOT control, MCU is used more and more widely, and norflash, as a non-volatile storage device, is an on-chip program memory integrated by MCU. The MCU is limited by the storage capacity of the SRAM, and the instructions of the CPU are generally executed on the flash, so the efficiency of the flash reading circuit directly affects the efficiency of the entire chip. The reading of norflash requires a pulse trigger signal. At present, the reading control circuit and the CPU adopt the same frequency design. If the highest reading efficiency is to be achieved, the CPU clock cycle must be half of the flash reading time, and the CPU frequency needs to be increased. The power consumption of the system. Summary of the invention [0003] The technical problem t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/26
CPCG11C16/26
Inventor 陈恒方励温浪明
Owner GREE ELECTRIC APPLIANCES INC