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Semiconductor device, method of fabricating the same, and patterning method

A semiconductor and patterning technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve problems such as the deterioration of the operational performance of semiconductor devices

Active Publication Date: 2017-03-29
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Reduction in size of MOS-FETs leads to deterioration of operational performance of semiconductor devices

Method used

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  • Semiconductor device, method of fabricating the same, and patterning method
  • Semiconductor device, method of fabricating the same, and patterning method
  • Semiconductor device, method of fabricating the same, and patterning method

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Embodiment Construction

[0021] Figure 1A is a perspective view illustrating a semiconductor device according to some examples of the inventive concept. Figure 1B is shown along Figure 1A A cross-sectional view of the section taken by the line A-A', the line BB' and the line CC', Figure 1C is shown along Figure 1A A cross-sectional view of a section taken by line DD', line EE' and line FF' of . Figure 2A yes Figure 1B An enlarged view of the 'H' section of the Figure 2B yes Figure 1C An enlarged view of the 'I' portion of the .

[0022] refer to Figure 1A to Figure 1C , active patterns and gate structures crossing (or straddling) the active patterns may be disposed on the substrate 100 . The substrate 100 may be a semiconductor substrate. As an example, the substrate 100 may be a bulk silicon wafer or a silicon-on-insulator (SOI) wafer.

[0023] The substrate 100 (or the device in general) may include a first region R1 and a second region R2. The active patterns may include a first a...

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Abstract

A method of fabricating a semiconductor device includes forming first and second active patterns on first and second regions, respectively, of a substrate, forming first and second gate structures on the first and second active patterns, respectively, forming a coating layer to cover the first and second gate structures and the first and second active patterns, and forming a first recess region in the first active pattern between the first gate structures and a second recess region in the second active pattern between the second gate structures.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2015-0134699 filed with the Korean Intellectual Property Office on September 23, 2015, the entire contents of which are hereby incorporated by reference. technical field [0002] The inventive concept relates to semiconductor devices, and in particular, to semiconductor devices having different series of patterns and forming recesses in regions where the different series of patterns are provided. For example, inventive concepts relate to semiconductor devices having metal oxide semiconductor field effect transistors (MOS-FETs) and the formation of recesses in which source / drain electrodes of the MOS-FETs are epitaxially grown. Background technique [0003] Semiconductor devices may include integrated circuits (ICs) including metal oxide semiconductor field effect transistors (MOS-FETs). As the size and design rules of such semiconductor devices decrease, MOS-FETs are becoming increasingly smaller. R...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/28H01L21/8234H01L21/8238
CPCH01L21/28008H01L21/823437H01L21/823456H01L21/823828H01L21/82385H01L21/823431H01L27/0886H01L29/66795H01L29/6656H01L21/30604
Inventor 韩东佑梁光容李珍旭田炅烨丁海建金度亨
Owner SAMSUNG ELECTRONICS CO LTD