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Method and device for eliminating packet switching head resistance

A message and purpose technology, applied in the field of large-capacity data exchange

Active Publication Date: 2020-07-24
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] In view of this, the embodiment of the present invention expects to provide a method and device for eliminating packet switching head resistance, so as to solve the problem of switching head resistance and improve system efficiency and performance

Method used

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  • Method and device for eliminating packet switching head resistance
  • Method and device for eliminating packet switching head resistance
  • Method and device for eliminating packet switching head resistance

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Embodiment Construction

[0056] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention.

[0057] figure 2 The flow chart of Embodiment 1 of the method for eliminating packet switching header resistance in the present invention, as shown in figure 2 As shown, the method for eliminating the switching head resistance of the message provided by the embodiment of the present invention is mainly improved in the first-level storage of the routing switching chip, which may include the following steps:

[0058] Step 201: Establish at least one second VIQ linked list according to the node information and destination port information of the first virtual input queue VIQ linked list, and update the node information of the first VIQ linked list.

[0059] The device for eliminating the switching head resistance of the message still first stores the message with the original V...

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Abstract

The embodiment of the present invention discloses a method for eliminating packet switching head resistance, including: establishing at least one second VIQ linked list according to the node information and destination port information of the first virtual input queue VIQ linked list, and updating the first VIQ The node information of the linked list; update the node information of the at least one second VIQ linked list after determining the team leader message of the at least one second VIQ linked list, and combine the team leader message and the at least one second VIQ linked list The destination port information is sent to the second-level storage. The embodiment of the invention also discloses a device for eliminating the switching head resistance of the message.

Description

technical field [0001] The invention relates to a large-capacity data exchange technology, in particular to a method and a device for eliminating the exchange header resistance of a message. Background technique [0002] With the rapid development of data networks, the switching capacity of routing and switching chips is also increasing rapidly. The industry generally adopts a method of queue linked list management to realize shared storage space to ease the pressure on switching capacity; Switching to the destination port according to the route is generally divided into a two-level storage structure and an intermediate level switching structure. [0003] The first-level storage structure adopts the virtual input queue (Virtual Input Queue, VIQ) method, that is, the source port (iport) of the message is used as the queue number to organize linked list storage; address, store the body of the message in the random access memory (Random Access Memory, RAM) (data_ram) of the bo...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L12/933H04L12/947H04L12/883H04L49/9015
CPCH04L49/103H04L49/252H04L49/9015
Inventor 季娟徐凤鸣赵培培钱情明
Owner SANECHIPS TECH CO LTD
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