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A task scheduling method, scheduler, computing device, and system

A computing device and task scheduling technology, applied in the computer field, can solve problems such as task1 being unable to be executed and task2 occupying resources, etc., to achieve the effects of improving task processing efficiency, optimizing allocation, and improving utilization

Active Publication Date: 2021-07-16
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, when task2 is issued in a large amount in a short period of time, task2 may occupy resources for a long time, and task1 cannot be executed

Method used

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  • A task scheduling method, scheduler, computing device, and system
  • A task scheduling method, scheduler, computing device, and system
  • A task scheduling method, scheduler, computing device, and system

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Experimental program
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Embodiment Construction

[0092] The following briefly introduces related concepts involved in various embodiments of the present invention:

[0093] Field Programmable Gate Array (Field Programmable GateArry, FPGA) is a semi-custom circuit, an FPGA can include one or more FGPA engines, and can perform one or more tasks.

[0094]FGPA Engine (FGPA Engine), a programmed hardware circuit unit with specific functions, can be composed of one or more FPGAs, and one FGPA can also include one or more FGPA engines, and one FGPA engine can execute one or more kind of task.

[0095] The resource pool includes at least one FGPA engine, and resources can be divided into multiple resource pools according to the types of tasks that can be executed by the FGPA engines in the resource pool. All FGPA engines in a resource pool can perform tasks of the same task type.

[0096] System resources, including all FPGA engines, are divided into at least one resource subsystem, each resource subsystem corresponds to a schedule...

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PUM

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Abstract

The embodiment of the invention discloses a task scheduling method, a scheduler, a computing device and a system. The method includes: a scheduler obtains a first task from a scheduling queue; the scheduling queue includes at least one task to be processed by the scheduler in sequence; determining the first task according to a preemptible level of the first task and a scheduling list An FPGA engine corresponding to a preemptible level of a task; wherein the scheduling list includes at least one preemptible level and a correspondence between each preemptible level in the at least one preemptible level and at least one FPGA engine identifier; The FPGA engine corresponding to the preemptible level of the first task executes the first task. By adopting the embodiments of the present invention, tasks with a low preemptible level also have the right to poll resources, avoid mutual blocking among multiple tasks, and improve the utilization rate of FPGA engine resources.

Description

technical field [0001] The invention relates to the field of computers, in particular to a task scheduling method, a scheduler, a computing device, and a system. Background technique [0002] As applications and services continue to increase the computing, storage and communication capabilities of big data centers, multi-core technology and Field Programmable Gate Array (Field Programmable Gate Arry, FPGA) technology are combined to improve data processing capabilities. Reasonable scheduling of tasks can make full use of FPGA resources and improve the utilization rate of FPGA resources. [0003] The task scheduling policy in the prior art schedules the tasks according to the urgency of the response time requirements of the tasks, so that the tasks with more urgent response time are given priority to the FPGA engine for execution. [0004] For example, the scheduler includes two kinds of tasks waiting to be delivered, and the second task (task2) > the first task (task1) i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/48G06F9/50
Inventor 黄勤业李怀洲袁泉
Owner HUAWEI TECH CO LTD
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