Supercharge Your Innovation With Domain-Expert AI Agents!

A FPGA-based Dynamically Reconfigurable Video Scaler

A technology of video scaling and reconfiguration, which is applied in the fields of digital video signal modification, image communication, electrical components, etc., which can solve the problems such as the inability to meet the new index requirements and affecting the video delay of the superimposed acquisition of the head-up display.

Active Publication Date: 2021-01-01
LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At the same time, the zoom calculation delay also directly affects the delay of the superimposed acquisition video of the head-up display.
[0003] The current video scaler directly relies on GPU implementation, and its implementation delay is more than 33 milliseconds, which can no longer meet the new index requirements

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A FPGA-based Dynamically Reconfigurable Video Scaler
  • A FPGA-based Dynamically Reconfigurable Video Scaler
  • A FPGA-based Dynamically Reconfigurable Video Scaler

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0028] Embodiments of the present invention are described in detail below, and the embodiments are exemplary and intended to explain the present invention, but should not be construed as limiting the present invention.

[0029] The FPGA-based dynamic reconfigurable video scaler, the logic architecture is implemented based on FPGA or CPLD, and consists of input video detection, scaling address traversal, scaling address mapping, frame buffer video data selection, calculation input buffer, frame buffer, and calculation video data selection , time delay, anti-aliasing calculation, output video data selection and scaling mode recognition unit.

[0030] The output end of the scaling mode identification unit is connected to the control input ends of the scaling address traversal unit, scaling address mapping unit, frame buffer video data selection unit, calculation video data selection unit and output video data selection unit through instruction signal lines. The scaling mode recog...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a dynamic reconfigurable video scaler based on FPGA. The scaler comprises input video detection, scaling address traversal, scaling address mapping, frame cache video data selection, calculation input cache, frame cache, calculation video data selection, time delay, anti-aliasing calculation, output video data selection, and scaling pattern identification units. The scalingpattern identification unit generates a scaling mode control instruction (a data flow control mark) and a scaling calculation parameter according to a given scaling parameter. The data flow control mark realizes the dynamic reconstruction of a video scaling system through controlling three video data selection units so as to achieve the significant reduction of video scaling time delay and the effective reduction of the video scaler to a frame cache reading and writing bandwidth demand. The reconfigurable video scaler has the flexible characteristics that a parameter can be configured in an online mode; and the structure can be dynamically changed and so on.

Description

technical field [0001] The invention relates to an FPGA-based dynamic reconfigurable video scaler, which belongs to the technical field of character video image processing in display devices. Background technique [0002] The head-up display superimposes the symbols to be displayed with the video collected by the forward-looking infrared or photoelectric radar and then projects them into the driver's front field of view. However, due to the difference in the field of view during the superimposition process of symbols and videos, the collected The video is scaled, and scaling is the first step in the video overlay process. The flexibility of scaling calculations and the demand for computing resources determine the complexity of the HUD system implementation. At the same time, the zoom calculation delay also directly affects the delay of the superimposed video acquisition of the head-up display. [0003] The current video scaler directly relies on GPU implementation, and its...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H04N19/423H04N19/436
CPCH04N19/423H04N19/436
Inventor 牛盼情王聪李请坤王浩然郭晓光
Owner LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2025 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com