Digital analog double-loop low-dropout linear voltage stabilizer

A low-dropout linear, digital simulation technology, applied in the direction of instruments, electrical variable adjustment, control/regulation systems, etc., can solve the problem of overshoot or undershoot of the output voltage of the voltage stabilizer, slow recovery time of the output voltage of the voltage stabilizer, Lack of transient response and other issues, to achieve the effect of improving transient response speed, small transistor area, and improving power supply rejection ratio

Active Publication Date: 2019-05-14
XIDIAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, when the traditional digital LDO load jumps, it can only turn on or off the transistors in the controlled transistor array sequentially. The output voltage recovery time of the regulator is sl

Method used

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  • Digital analog double-loop low-dropout linear voltage stabilizer
  • Digital analog double-loop low-dropout linear voltage stabilizer
  • Digital analog double-loop low-dropout linear voltage stabilizer

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Embodiment 1

[0048] See figure 1 , figure 2 , image 3 , Figure 4 , Figure 5 , Figure 6 , figure 1 A schematic structural diagram of a digital-analog dual-loop low-dropout linear regulator provided for an embodiment of the present invention; figure 2 A schematic structural diagram of another digital-analog dual-loop low-dropout linear regulator provided for an embodiment of the present invention; image 3 A schematic structural diagram of yet another digital-analog dual-loop low-dropout linear regulator provided for an embodiment of the present invention; Figure 4 A schematic circuit diagram of a digital-analog dual-loop low-dropout linear regulator provided by an embodiment of the present invention; Figure 5 A schematic circuit diagram of a control unit in a digital-analog dual-loop low-dropout linear regulator provided by an embodiment of the present invention; Figure 6 A schematic circuit diagram of a step-size variable counter in a digital-analog dual-loop low-dropout l...

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Abstract

The invention relates to a digital analog double-loop low-dropout linear voltage stabilizer. The voltage stabilizer comprises an operational amplifier comparison unit, a control unit and a modulationgroup unit, wherein the operational amplifier comparison unit is used for comparing an output voltage of the voltage stabilizer with a target voltage of the voltage stabilizer, and outputting a firstcomparison result and an operational amplifier amplification error value; the control unit is connected with the output ends of the operational amplifier comparison unit and the voltage stabilizer, and is used for obtaining a jump detection result according to the first comparison result and obtaining a second comparison result according to the output voltage of the voltage stabilizer; and the modulation group unit is connected with the operational amplifier comparison unit and the control unit, and modulating the output voltage of the voltage stabilizer according to the first comparison result, the operational amplifier amplification error value, the jump detection result and the second comparison result. The modulation group unit is adopted to modulate the output voltage of the voltage stabilizer, and voltage stabilization can be rapidly completed when the voltage change is relatively great, so that the transient response speed of the voltage stabilizer is increased, and the problemsof overshoot and undershoot of the output voltage of the voltage stabilizer are effectively reduced.

Description

technical field [0001] The invention belongs to the technical field of power supply management, and in particular relates to a digital-analog double-loop low-dropout linear regulator. Background technique [0002] At present, a low dropout regulator (LDO for short), as an important module of power management, has been widely used in various fields of microelectronic technology. [0003] In an LDO circuit, the way the transistor current is controlled determines the structural classification of the LDO. The analog LDO controls the voltage from the gate to the source of the power transistor, and then controls the magnitude of the outflow current to stabilize the output voltage; while the digital LDO controls the magnitude of the outflow current by controlling the number of on and off of the power transistor to stabilize the output voltage. Analog LDOs usually consist of an error amplifier and a power transistor, while digital LDOs consist of a digital controller and an array o...

Claims

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Application Information

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IPC IPC(8): G05F1/56
Inventor 刘帘曦陈逸伟贺磊廖栩锋朱樟明
Owner XIDIAN UNIV
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