Apparatus for performing deinterleaving of binary data stream and dvb-t2 receiver

A binary data stream and de-interleaving technology, which is applied in the field of data processing, can solve the problems of not providing a de-interleaving device, and achieve the effects of reducing cost and size, reducing cost, and reducing storage capacity

Active Publication Date: 2019-10-25
ALTO BEAM (CHINA) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] There is currently no deinterleaving mechanism available that performs a

Method used

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  • Apparatus for performing deinterleaving of binary data stream and dvb-t2 receiver
  • Apparatus for performing deinterleaving of binary data stream and dvb-t2 receiver
  • Apparatus for performing deinterleaving of binary data stream and dvb-t2 receiver

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Experimental program
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Embodiment Construction

[0031] definition

[0032] 16-QAM: Hexadecimal quadrature amplitude modulation

[0033] 256-QAM: 256 quadrature amplitude modulation

[0034] 64-QAM: 64 quadrature amplitude modulation

[0035] QPSK: Quaternary Phase Shift Keying

[0036] DVB T2: Digital Video Broadcasting - Second Generation Terrestrial Broadcasting

[0037] OFDM: Orthogonal Frequency Division Multiplexing

[0038] LDPC: Low Density Parity Check Code

[0039] FEC: forward error correction

[0040] TI: Time domain interleaving

[0041] TDI: Time Domain Deinterleaving

[0042] FEC block: A set of N carrying all bits of an LDPC FECFRAME cells OFDM unit

[0043] FECFRAME: A set of N from an LDPC encoding operation ldpc (16200 or 64800) bits

[0044] OFDM element: the modulation value of an OFDM carrier during an OFDM symbol (e.g. a single constellation point)

[0045] TI block: A group of units performing time-domain interleaving, which corresponds to a use of the time-domain interleaver memory

[0...

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Abstract

The disclosure provides an apparatus for performing deinterleaving of a binary data stream and a DVB-T2 receiver, the apparatus comprising a mapping device and a semiconductor memory, the apparatus comprising a mapping device and a semiconductor memory; said mapping device comprising: an input interface arranged to receive said binary data stream and an output interface arranged to output a deinterleaved instance of said binary data stream; a row mapper, operatively connected to said input interface and said semiconductor memory, said row mapper being configured to group data received throughsaid binary data stream into "write" commands for said semiconductor memory; and a row deinterleaver, operatively connected to said semiconductor memory and said output interface, said row deinterleaver being configured to present deinterleaved data, retrieved from said semiconductor memory by means of "read" commands, to said output interface; wherein said semiconductor memory is an SDRAM memory;and wherein each of said "write" commands is an SDRAM write command for at least part of an SDRAM row, said SDRAM write commands being calculated such that said deinterleaved data can be written to and read out in SDRAM burst mode. By providing a row mapper that acts on the received data stream prior to its storage in the external memory, a data ordering can be achieved that permits the retrievalof deinterleaved data at a reduced bandwidth, in particular by using a burst-read operation on an SDRAM memory.

Description

technical field [0001] The invention relates to the field of data processing, in particular to a device for performing time-domain deinterleaving of binary data streams in a digital video broadcasting-second generation terrestrial (DVB-T2) receiver. Background technique [0002] Many telecommunication standards require that the transmitted data stream be interleaved at the transmitter and de-interleaved at the receiver in order to improve the forward error correction (FEC) mechanism's ability to resist bursts of noise. The same goes for a DVB-T2 transmitter or DVB-T2 receiver. The deinterleaving apparatus provided in the related art operates on an on-chip static random access memory (SRAM) in consideration of a large number of memory accesses for realizing the deinterleaving process. [0003] There is currently no provision for a de-interleaving mechanism with the same performance as an SRAM-based implementation without relying on expensive SRAM memory. Contents of the in...

Claims

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Application Information

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IPC IPC(8): H04L27/26
CPCG11C7/02G11C7/1012G11C7/1021G11C8/04G11C11/4076G11C11/408G11C11/4096H03M13/255H03M13/2707H03M13/2782H03M13/6505H03M13/6552H04L1/0071H04L27/26
Inventor 梅国强林志好曾朝煌王晓晖王军伟
Owner ALTO BEAM (CHINA) INC
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