Fast Transient Response LDO and Its Circuit

Abstract

The invention discloses a fast transient response LDO and its circuit. The circuit includes a fast path and a slow path, and the fast path is composed of a load transistor, a seventh transistor and a sixth transistor. The slow path is composed of a load transistor, a first transistor, a fifth transistor and a seventh transistor. The fast path is used to increase the loop bandwidth, and the slow path is used to increase the DC accuracy. The second capacitor and the third capacitor in the circuit can sense the load change, and correspondingly increase or decrease the current flowing through the fourteenth transistor and the third transistor through capacitive coupling, and charge and discharge the gate capacitance of the load transistor by increasing The speed thus speeds up the loop response speed and reduces the overshoot value of the output voltage.

Description

technical field [0001] The invention relates to the field of circuit design, in particular to a fast transient response LDO and its circuit. Background technique [0002] Low-dropout linear regulator (LDO), as a commonly used power management chip, has the advantages of simple structure, low cost, low noise, low power consumption and simple peripheral circuits, and is widely used in medical, computer, industrial basic equipment and portable products and many other fields. The traditional LDO with an off-chip capacitor structure needs to add a large microfarad capacitor outside the chip. On the one hand, it is easy to make the output pole become the dominant pole, which is convenient for frequency compensation; on the other hand, although the external large capacitor will reduce the loop However, when the LDO load changes rapidly, the output can be stabilized by charging and discharging the capacitor before the circuit responds to the load change. Similarly, the LDO with an ...

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Problems solved by technology

However, because the external capacitor is large and requires a specific range of equivalent series resistance resistance, it also occupies additional chip pins and a large printed circuit board area, which is not conducive to chip integration and limits its application.

[0003] In recent years, LDOs without off-chip capacitors have become more and more popular. The design difficulties are mainly in stability and transient response speed. Without large off-chip capacitors, internal pole compensation must be used to improve stability. This will undoubtedly Increase the complexity and design difficulty of the circuit, often at the expense of power consumption and accuracy

In addition, when the load current changes suddenly, limited by the loop response speed, the output voltage will have a large overshoot

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