Microprocessing device having programmable waist states
A waiting state, micro-processing technology, applied in the direction of electrical digital data processing, instruments, calculations, etc., can solve the problem of CPU clock cycle extension and other issues
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0018] Referring to FIG. 1 , data processing system 100 of the present invention includes a variety of various subsystems arranged around system bus 120 . Microprocessing unit 110 , such as a microcontroller or the like, includes core logic 112 and internal memory 114 . The internal clock 156 provides the clock signal s130 to the driver micro-processing unit 110 . Data transfers between core logic 112 and memory 114 occur over internal bus 116 . The internal bus is connected to the system bus 120 to provide data transmission to the outside of the micro-processing unit 110 . Exiting the bus 116 is a memory address line s140 to a memory controller 152 . The core logic 112 provides a data selection signal s142, indicating that the core needs data transfer (read or write). In particular, signal s142 HI indicates a data transfer cycle, and signal s142 LO indicates an address cycle. The data selection signal is sent to the storage controller 152 and the wait state generator 160 ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 