Sampling hold circuit, analog-to-digital converter and wifi chip

A sample-and-hold circuit and circuit technology, applied in the direction of analog-to-digital converter, analog-to-digital conversion, code conversion, etc.

Inactive Publication Date: 2021-07-06
中科威发半导体(苏州)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In order to solve the linear distortion of the sample-and-hold circuit in the prior art and other problems introduced when improving these problems, the purpose of the

Method used

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  • Sampling hold circuit, analog-to-digital converter and wifi chip
  • Sampling hold circuit, analog-to-digital converter and wifi chip
  • Sampling hold circuit, analog-to-digital converter and wifi chip

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Embodiment Construction

[0023] The present invention will be described in detail below in conjunction with specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0024] An embodiment of the present invention provides a sample and hold circuit, an analog-to-digital converter, and a wifi chip. high speed.

[0025] As mentioned in the background art, many analog-to-digital converters are configured with a sample-and-hold circuit, which stabilizes the input of an analog signal by operating alternately in a tracking phase and a holding phase. And the analog-to-digital converter of this embodiment is also used in the wifi chip, that is, the sample and hold circuit is set in the wifi chip.

[0026] Specifically, the sample and hold circuit of this embodiment, refer ...

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PUM

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Abstract

The invention discloses a sampling hold circuit, an analog-to-digital converter and a wifi chip. The sampling hold circuit comprises a clock generation sub-circuit, a grid voltage bootstrap sub-circuit and a sampling field effect transistor; the grid voltage bootstrap sub-circuit outputs a second control signal to a grid electrode of the sampling field effect transistor, the voltage is the sum of the conduction voltage and the input voltage of the signal input end, and the conduction voltage is greater than the input voltage of an external power supply. The circuit does not introduce non-ideal harmonic waves, eliminates the interference of the input voltage of the signal input end on the sampling field effect transistor, does not generate negative influence on the output signal-to-noise ratio of the analog-to-digital converter, reduces the on-resistance of the sampling field effect transistor, and improves the response speed of the switch; the strict linear relation between the input signal and the output signal of the sampling hold circuit is guaranteed, and the performance of the circuit is improved.

Description

technical field [0001] The invention relates to a sampling and holding circuit, in particular to an analog-to-digital converter and a wifi chip provided with the sampling and holding circuit. Background technique [0002] In the process of sampling the analog input signal, most of the analog-to-digital converters (ADc) are equipped with a sample-and-hold circuit. The sample-and-hold circuit is used to stabilize the continuously changing analog input signal, and the two stages of tracking and holding are alternately performed. [0003] There are some problems in the existing sample and hold circuit, such as linear distortion, the sampling signal obtained by the sample and hold circuit will have non-ideal harmonics, so that when the circuit is used in a high-precision analog-to-digital converter, it will affect the analog-to-digital converter negatively impacts the output signal-to-noise ratio. In order to improve the problem of linear distortion, the existing technology will...

Claims

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Application Information

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IPC IPC(8): H03M1/12H03M1/54
CPCH03M1/12H03M1/54
Inventor 何力杨奕
Owner 中科威发半导体(苏州)有限公司
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