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Method for forming self-aligning contact window structure

A technology of self-aligned contact and gate structure, applied in the direction of semiconductor devices, etc., can solve the problems of peeling (peeling, over-etching of insulating layer 8 and sidewall spacer 10, increase of gate conductor resistance value, etc.

Inactive Publication Date: 2006-12-13
PROMOS TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, if the etching time is not properly controlled, this method will cause the insulating layer 8 and the sidewall spacer 10 to be over-etched, and the second conductive layer 6 below it will be exposed.
The exposed portion of the second conductive layer 6 will contact the metal layer 14 at point 16 to cause a short circuit
[0015] However, the method for forming the self-aligned contact window structure provided by U.S. Patent No. 5,989,987 has the following disadvantages: (1) the etching step of the second conductive layer 6 is a comprehensive etching, which does not cause gate conductor / bit line contact In the region where the window is short-circuited, the second conductive layer 6 is also etched, because the cross-sectional area on both sides of the second conductive layer 6 becomes smaller, causing the resistance value of the gate conductor to rise; (2) this etching step will cause the second conductive layer 6 The contact area with the first conductive layer 4 is reduced. If the contact area is reduced too much, it will cause peeling in the subsequent process.

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  • Method for forming self-aligning contact window structure
  • Method for forming self-aligning contact window structure
  • Method for forming self-aligning contact window structure

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Embodiment Construction

[0097] The first embodiment of the present invention consists of Figure 3A to Figure 3F The structure shown and Figure 4A to Figure 4B The method shown in the flowchart represents.

[0098] Firstly, a substrate 2 is prepared, on which a first conductive layer 4 , a second conductive layer 6 and an insulating layer 8 are sequentially formed. The first conductive layer 4 can be a polysilicon (polysilicon) or amorphous silicon (amorphoussilicon) layer, the second conductive layer 6 can be a metal silicide layer, such as tungsten silicide (WSi), and the insulating layer can be a silicon nitride (SiN) layer . Next, if Figure 4A As shown, a gate conductor (gate conductor, GC) mask is opened (step 401 ); then an etching process is performed to etch to the substrate surface to form a plurality of gate structures (step 402 ).

[0099] Next, if Figure 3A and Figure 4A As shown, a photoresist material layer 22 is deposited on the entire substrate, or an anti-reflective coating...

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Abstract

The invention discloses a method for forming a self- aligning contact window structure having local etching grid electrode conductive layer which comprises, preparing a substrate, depositing a photosensitive resist material layer on the substrate, exposing part of the substrate surface, exposing the second conductive layer, removing the residue photosensitive resist material layer, forming a side wall on each side wall of the grid structure, forming a dielectric layer covering the substrate, photoetching and etching the dielectric layer to form self-aligning contact window structure.

Description

technical field [0001] The present invention relates to a kind of method of forming self-aligned contact window structure; Specifically, the present invention relates to a method for removing gate conductor / bitline contact (gateconductor / bitline contact, GC / Shortcomings of CB) short circuit and method to increase larger process window. Background technique [0002] Generally, a metal oxide semiconductor (MOS) device is composed of a metal layer, a silicon oxide layer and a substrate. Due to poor adhesion between metal and oxide, polysilicon is often used instead of metal to form the conductive layer of the gate structure of the MOS device. However, the disadvantage of polysilicon is that its resistance is higher than that of metals. Although it can be doped with impurities to reduce the resistance, the resulting conductivity cannot be used as a good conductive layer in MOS devices. A common solution is to add a layer of metal silicide, such as tungsten silicide (WSi), on ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28
Inventor 董明圣李岳川
Owner PROMOS TECH INC