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Integrated circuit chip

A technology of integrated circuits and chips, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems affecting the electrical quality of integrated circuit chips 40, accumulation, and the inability to transfer charges to P-type silicon substrates 44

Active Publication Date: 2005-06-01
AIROHA TECHNOLOGY CORPORATION
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  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0010] Although the polysilicon layer 49 and the gate oxide layer 47 can reduce the noise coupling phenomenon of the integrated circuit chip 40, the charges generated during the process of manufacturing the fixed sealing ring 41 by the plasma etching method cannot be transferred to the P-type silicon substrate 44, and the charges The problems that will accumulate on the fixed sealing ring 41 will seriously affect the electrical quality of the integrated circuit chip 40

Method used

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Embodiment Construction

[0072] Please refer to Figures 4~6 at the same time. Figure 4 Showing a top view of an integrated circuit chip according to a preferred embodiment of the present invention, Figure 5 shows along Figure 4 Partially enlarged cross-sectional view of the integrated circuit chip viewed by the cross-hatching line 5-5', Image 6 means along Figure 4 Partially enlarged cross-sectional view of the integrated circuit chip viewed by the section line 6-6'. In Figures 4-6, the integrated circuit chip 70 includes a silicon substrate 57, a fixed seal ring (seal ring) 71, a ground ring (ground ring) 72, at least one circuit and an output / input pad (input / output pad) , I / O pad) and at least one guard ring (guard ring), such as digital circuit 73, radio frequency circuit 74 and guard rings 55 and 56. Wherein, the digital circuit 73 and the radio frequency circuit 74 respectively have an output / input pad 73a and 74a. Fixed seal ring 71 , ground ring 72 , digital circuit 73 , radio frequenc...

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Abstract

The integrated circuit chip includes one silicon base board, at least one circuit, one fixed sealing ring, one earthing ring and at least one protecting ring. The circuit is formed on the silicon base board and has at least one I / O pad. The fixed ring formed on the silicon base board encloses the circuit and the I / O pad. The earthing ring formed between the silicon base board and the I / O pad is connected electrically to the fixed sealing ring. The protecting ring on the silicon base board and around the I / O pad is connected electrically to the fixed sealing ring.

Description

technical field [0001] The present invention relates to an integrated circuit (integrated circuit, IC) chip (chip), and particularly relates to an integrated circuit chip with a fixed seal ring (seal ring), a ground ring (ground ring) and a guard ring (guard ring). Background technique [0002] A semiconductor wafer (wafer) forms several integrated circuit chips through an integrated circuit manufacturing process, and each integrated circuit chip contains multiple circuits, such as digital (digital) circuits, analog (analog) circuits, and radio frequency (radio frequency, RF) circuit. A scribe is provided between any two adjacent integrated circuit chips to facilitate cutting of the integrated circuit chips. During the process of cutting the integrated circuit chip, the cutting stress generated will cause the circuit in the integrated circuit chip to be destroyed. Therefore, a fixed seal ring is usually designed between the IC chip and the dicing line to protect the struct...

Claims

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Application Information

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IPC IPC(8): H01L23/58H01L27/04
Inventor 陈升祐
Owner AIROHA TECHNOLOGY CORPORATION
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