361 results about "Microprocessor chip" patented technology

The present invention provides an improved cache memory architecture with way prediction. The improved architecture entails placing the address tag array of a cache memory on the central processing unit core (i.e. the microprocessor chip), while the cache data array remains off the microprocessor chip. In addition, a way predictor is provided in conjunction with the improved memory cache architecture to increase the overall performance of the cache memory system.

A test apparatus and method for design verification of at least one microprocessor chip includes a compatible Joint Task Action Group (JTAG) terminal for access to a plurality of computer functional units contained in the chip. A test input terminal included in the JTAG terminal receives a scan string, the string being coupled to each computer functional unit through a first multiplexer. The scan input string is separated by the JTAG terminal under program control into a series of dedicated scan strings, each dedicated scan string being supplied to a selected functional unit through the first multiplexer. Each functional unit includes start and stop scan clocks for testing the functional under program control using the dedicated scan train for the functional unit. A test output terminal included in the JTAG terminal is coupled to each functional unit through a second multiplexer. The test results of the dedicated scan string under control of the scan clock are supplied to the output terminal through the second multiplexer. The compatible JTAG terminal includes further elements for controlling the scan clocks to select a targeted functional unit for testing purposes while the scan strings for non-targeted functional units remain in an inactive state.

A microprocessor chip on a semiconducting substrate has at least two CPU cores that have hot spots on one side, a private cache memory for each CPU core that is located on the same side of said CPU core as the hot spot, a common cache memory that can be accessed by each CPU core, and an on-chip bus line connecting the CPU cores to the common cache memory. The CPU cores are located on each side of the on-chip bus line with their hot spots and their private cache memories positioned away from the on-chip bus line. Some of the CPU cores on the chip may be low power consumption CPU core and some of the CPU cores may be high speed CPU cores. The CPU cores may also be the same or different performance or purpose cores. A clock generator circuit may connect the CPU cores.

A device for fault testing in a microprocessor chip provides a LBIST circuit which has a first reference signature. A loading unit is further provided for receiving and outputting a set of masking data. A file unit connected to the loading unit is yet further provided for receiving the masking data. A masking unit connected to the file unit is yet further provided for generating a second reference signature based on the masking data from the file unit and a scanning data from a scan string in the chip. And, a signature logic connected to the output of the masking unit is yet further provided for compressing the second reference signature and inputting the compressed second reference signature to the LBIST circuit, wherein the compressed second reference signature replaces the first reference signature.

A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.

A system and method for projecting reliability includes a module, such as a chip, which includes workload inputs, which account for activity on the chip. A reliability module interacts with the chip to determine a reliability measurement for the chip based upon the workload inputs such that functions of the chip are altered based upon the reliability measurement. The reliability measurements are employed to rate or improve chip designs or calculate a reliability measure in real-time.

A method, system, and computer program product are disclosed for dynamically managing power in a microprocessor chip that includes physical hardware elements within the microprocessor chip. A process is selected to be executed. Hardware elements that are necessary to execute the process are then identified. The power in the microprocessor chip is dynamically altered by altering a present power state of the hardware elements that were identified as being necessary.

A device tracking system for tracking location coordinates of a portable device in real time is provided. The system includes a microprocessor chip in which a GPS transceiver is embedded. The microprocessor chip is installed in the portable device. The system also includes at least one GPS satellite capable of communicating with the GPS transceiver for obtaining location coordinates of the portable device, at least a second GPS transceiver coupled with the GPS satellite via a satellite antenna for receiving the obtained location coordinates; and a computer server coupled with the second GPS transceiver for communicating the obtained location coordinates to an authorized user via a web-enabled program.

A coherency controller for configurable caches. A base microprocessor design accommodates system configurations both with and without L2 cache tag and data arrays installed. Second level cache control logic exists within the microprocessor chip, and when the external second level cache tag and data arrays are removed their inputs to the microprocessor are tied to an inactive state. A configuration switch is set in the second level cache controller that causes snoop requests from a system bus to get reflected onto a first level cache snooping path. The first level cache status is then fed back to the second level cache controller, in a manner consistent with the timing required for support of a second level cache search, and fed into the second level cache status signal generation logic, effectively making the second level cache controller believe that the second level cache still exists for snooping. All other actions remain the same in the second level cache controller providing an effective and simple method for supporting snooping bus protocols. A result is that now every bus request snoops the first level cache without knowledge of presence of an L2 cache. This environment is provided to support entry level single processor configurations where the snooping requests only amount to input / output traffic.

A method for estimating power consumption within a multi-core microprocessor chip is provided. An authorized user selects a set of activities to be monitored. A value for each activity of the set of activities is stored in a separate counter of a set of counters, forming a set of stored values. The value comprises the count multiplied by a weight factor specific to the activity. The set of activities are grouped into subsets. The stored values corresponding to each activity in each subset are summed, forming a total value for each subset. The total value of each subset is multiplied by a factor corresponding to the subset, forming a scaled value for each subset. The scaled value of each subset is summed, forming a power usage value. A power manager adjusts the operational parameters of the unit based on a comparison of the power usage value to a threshold value.

Embodiments of three-dimensional semiconductor devices and fabrication methods are disclosed. The method includes forming a first and a second memory chips and a microprocessor chip. The method also includes bonding a first interconnect layer of the first memory chip with a second interconnect layer of the second memory chip, such that one or more first memory cells of the first memory chip are electrically connected with one or more second memory cells of the second memory chip through interconnect structures of the first and second interconnect layers. The method further includes bonding a third interconnect layer of the microprocessor chip with a substrate of the second memory chip, such that the one or more microprocessor devices of the microprocessor chip are electrically connected with one or more second memory cell of the second memory chip through interconnect structures of the second and third interconnect layers.

The present invention discloses a sphygmomanometer having 3D positioning function, which comprises a microprocessor chip which is coupled individually to a microprocessor chip which is coupled individually to a pressure sensor, an alarm unit, a storing unit, a 3D acceleration sensor chip, a display device, a driving device, and an air valve, so that when a person's blood pressure is measured, the 3D acceleration sensor chip detects the spatial position of the measuring cuff of the sphygmomanometer and sends the parameters related to the detected spatial position to the microprocessor chip. In the meantime, the microprocessor chip will retrieve a predetermined range of the parameters related to the spatial position from the storing unit, and compare such range with the value of the detected parameters. If the values of the detected parameters fall beyond the predetermined range of parameters, the microprocessor chip will issue an alarm through the alarm unit until the spatial position is correct. Thus the person who takes blood pressure measurement can always get the most accurate measurement.

One embodiment disclosed relates to a method of executing program code on a target microprocessor with multiple CPU cores thereon. One of the CPU cores is selected for testing, and inter-core context switching is performed. Parallel execution occurs of diagnostic code on the selected CPU core and the program code on remaining CPU cores. Another embodiment disclosed relates to a microprocessor having a plurality of CPU cores integrated on the microprocessor chip. Inter-core communications circuitry is coupled to each of the CPU cores and configured to perform context switching between the CPU cores.

The invention provides an electric water heater water boiling and anti-dry-heating control method, and relates to an electric water heater water boiling and dry-heating judgment and control method. The method includes the following steps that (A) a control circuit board with a micro processor chip as a core is arranged in an electric water heater; (B) two temperature sensors for detecting water temperature are placed in the electric water heater, one is far away from a heating tube, and the other one is near the heating tube, but is not contact with the heating tube; (C) temperatures of two measurement points are detected in real time; (D) the temperature difference of the two measurement points is calculated through a micro processor; (E) the temperature difference is compared with a previous temperature difference to obtain a temperature difference development trend; (F) the temperature difference development trend is judged, if the temperature difference development trend is rising, lowering and mild changing, it is indicated that water is boiling, and accordingly a heating power supply is turned off or a start of needed boiling time is formed, and if the temperature difference development trend is lowering, mild changing and rising, it is indicated that dry heating is to occur, and accordingly the heating supply can be turned off or water is supplemented. In the heating process of water, the dry-heating phenomenon can be truly eliminated.

The invention discloses a disposal method used for the digital delay of an active power filter and the corresponding devices. The invention comprises the following steps that a load current is sampled by selecting a time point which is prior to the time Vt when duty cycle loading is implemented, and the current value of the load at current time is detected; the harmonic component in the load current is calculated based on a change detection algorithm; the output current of active power filter is sampled by selecting the middle-point times of all switch periods of PWM signals; close ring control is carried out for the harmonic component of the load current and the output current of the active power filter, the PWM signal is modulated and a power device is driven. By adopting the method, the effect of digital delay to the compensation precision of the active power filter is reduced; the sampling delay of the load current with periodic harmonic is eliminated; the operation time is little, and full digitization is easy to be implemented. The invention is more applicable to the microprocessor chips with medium prices and processing speed, and reduces the cost of active power filter.

Disclosed is an integrated active heat spreader and exchanger. The heat spreader cum exchanger includes a housing with a conductive heat spreader therein. A spreader plate of the heat spreader is in thermal contact with a microprocessor chip to be cooled and a plurality of spreader fins extending from the spreader plate. A membrane connects the heat spreader and the housing, sealing an interface between the heat spreader and the housing. A top plate, including a plurality of top plate fins, is disposed in the housing. A pump is located between the top plate fins and the spreader fins and urges fluid across the spreader fins and conducts heat from the spreader fins. The top plate fins conduct heat from the fluid and into a heat sink in thermal contact with the top plate. A heat sink plate conducts heat into heat sink fins where the heat is dissipated.

The invention relates to a wireless remote-control method which includes the following steps: MAC addresses are respectively arranged for a transmitting terminal and a receiving terminal; microprocessor chips are respectively arranged at the transmitting terminal and the receiving terminal and the MAC addresses of the transmitting terminal and the receiving terminal are respectively written into the respective microprocessors; the MAC address information of the transmitting terminal is stored into the receiving terminal, while the MAC address information of the receiving terminal is stored into the transmitting terminal; the transmitting terminal transmits a controlling signal with the stored MAC address information of the receiving terminal; the transmitted MAC address is compared with the MAC address stored in the receiving terminal by the receiving terminal, if the transmitted MAC address is matched with the stored MAC address, the controlling signal is received and relative operation is carried out, otherwise, no operation is responded; the receiving terminal transmits a controlling signal with the MAC address information of the transmitting terminal to the transmitting terminal, and the transmitting terminal compares the transmitted MAC address of the receiving terminal with the stored MAC address of the receiving terminal, if the transmitted MAC address is matched with the stored MAC address, the controlling signal is received and relative operation is carried out, otherwise, no operation is responded.

The invention discloses an anti-peep system and a method for automatically adjusting a backlight angle of a display screen based on an angle of human eyes and the screen. The system comprises a mobile phone body, the display screen and a circuit board, wherein the display screen and the circuit board are installed in the mobile phone body. The circuit board is provided with a mobile phone central processing unit (CPU), a microprocessor chip, a vision sensor and an angle sensor. The display screen is connected with the mobile phone CPU through a backlight source. The mobile phone CPU is connected with the vision sensor and the angle sensor through the microprocessor chip. According to the system and the method, through inductive measurement for the angle of the user eyes and the screen, a vision angle of the human eyes and the screen is obtained, an angle of an emergent light of the backlight source of the mobile phone is calculated according to the vision angle, and a liquid crystal molecular angle of the display screen is correspondingly deflected and is in fit with the vision angle of the human eyes. Compared with the prior art, the system and the method can effectively solve the problem that due to the fact that a visual angle of an existing mobile phone screen is large, privacy of the mobile phone is easy to peep by other persons.

The invention is suitable for the technical field of the digital television and provides a top box system for a digital television. The top box system of the digital television includes a top box of the digital television and a remote controller. The top box of the digital television includes a microprocessor chip and a bus interface. The top box of the digital television further includes a wireless network card. The wireless network card is connected with the microprocessor chip through the bus interface. The remote controller further includes a CPU and a wireless RF chip. The CPU of the remote controller controls the wireless RF chip to communicate with the wireless network card of the top box of the digital television through a wireless transmission protocol. The invention solves the problem that complex data lines are need to be connected when the top box of the digital television is used for carrying out the functions like video on demand, webpage browsing, network game, video and voice, etc., in the prior art.

The invention discloses an automatic detection method and an automatic detection device for a connection wire of an electrical experimental facility. The automatic detection device for the connection wire of the electrical experimental facility comprises a (Micro Processing Unit) MCU, an 8155 chip, 24 relays, 24 free-wheeling diodes, 24 triodes, 48 connection terminals, 24 current-limiting resistors, 24 pull-up resistors, a communication module, an alarming module and a keyboard module. The automatic detection device for the connection wire of the electrical experimental facility adopts the triodes to drive the relays, so that the circuit is simple in structure, the elements are less, the cost is low, the connection status among the terminals of the experimental facility can be automatically detected, the elements are protected effectively, and the reliability is high; the intelligent detection device is adopted, so that the workload of experiment advisors can be effectively reduced; once the detection device emits alarm information, students can find problems by themselves, so that the problem-solving ability of the students is effectively improved, and the quality of teaching is ensured. The automatic detection method and the automatic detection device for the connection wire of the electrical experimental facility are applicable to all electrical experimental facilities for teaching.

A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input / output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate.

The invention discloses a device for the intelligent control of LED (light-emitting diode) indoor illumination. The device comprises a sensor, a sampling module, an A / D (analog-to-digital) converter, an intelligent processing chip, an internal memory, an input device, a display screen, a PWM (pulse-width modulation) signal generator, an LED drive circuit, an LED spotlight mode converting switch and an LED lamp system, wherein the LED lamp system comprises LED lamps with various colors and spotlight modules in different directions; the sensor is used for receiving the external signals and converting the signals into analog electrical signals; the sampling module is connected with the sensor and used for sampling the signals received by the sensor; the output terminal of the sampling module is connected with the A / D converter and used for transmitting the sampled optical signals to the A / D converter; the A / D converter is used for converting the received analog signals into digital signals and transmitting the converted signals to the intelligent micro-processor chip connected with the A / D converter; and the intelligent micro-processor chip is further connected with the sampling module and used for providing the clock frequency for the sampling module. Accordingly, the device is capable of automatically adjusting the light intensity, color and direction of the LED.

The invention seek to enable to share main components other than a tightening unit even in use for different effective lengths corresponding to ranges of tightening torques. There are provided: a tightening unit 10 such as a ratchet; a housing 20 having a two-divided structure including a front side cover part 21 and a back side grip part 22; a strain body 30 provided inside the housing 20 and replaceably coupling the tightening unit 10 thereto; a distortion sensor 40, provided to the strain body 30, for detecting the distorted amount of the strain body 30 due to the tightening force of the tightening unit 10; a microprocessor chip 100 having functions including computing the tightening torque of the tightening unit 10 based on torque reference values prepared in advance and detection results of the distortion sensor 40; and an output unit 300 for outputting such as the tightening torque.

The invention discloses a multimedia sound system provided with an audio digital interface and the system comprises at least one USB / IEEE1394 interface, one USB / IEEE1394 external sound card, a group of D or T type audio power amplifier chips or a group of control circuits or microprocessor chips matched with the sound card and the amplifier, a PCB board and a pair of two-channel sound boxes. Each sound box is at least provided with a double-coil double-magnetic gap or multi-coil multi-magnetic gap all band loudhailer the caliber of which is less than 7 inches and which is only provided with one vibrating diaphragm and has a resistance load characteristic or a characteristic similar to the resistance load characteristic, thus forming a plurality of high fidelity or monitoring grade multimedia sound systems the working voltages of which are equal to or less than 5.25V and the input powers of which are more than or equal to 1W under the load of 3 to 4Omega.

The present invention discloses a sphygmomanometer having 3D positioning function, which comprises a microprocessor chip which is coupled individually to a microprocessor chip which is coupled individually to a pressure sensor, an alarm unit, a storing unit, a 3D acceleration sensor chip, a display device, a driving device, and an air valve, so that when a person's blood pressure is measured, the 3D acceleration sensor chip detects the spatial position of the measuring cuff of the sphygmomanometer and sends the parameters related to the detected spatial position to the microprocessor chip. In the meantime, the microprocessor chip will retrieve a predetermined range of the parameters related to the spatial position from the storing unit, and compare such range with the value of the detected parameters. If the values of the detected parameters fall beyond the predetermined range of parameters, the microprocessor chip will issue an alarm through the alarm unit until the spatial position is correct. Thus the person who takes blood pressure measurement can always get the most accurate measurement.

The invention relates to a testing system for power battery source, belonging to the testing technology field of battery source. It can provide the problem that there is larger error in working current measurement to power source and measuring calculation to battery energy SOC and the error is more than +-10% so that single battery is destroyed because of over-voltage or under-voltage. Its display circuit (3) and CAN transceiver (4) are connected on the microprocessor chip (2) respectively. Multiple voltage equalization measuring circuits (2) and current sensor (13) are connected on the microprocessor chip (2) by multiple-channel analog switch circuits (1). Sound-light alarming device (6) is connected on the microprocessor chip (2) by feedback module circuit (5). The invention can measure working current of power battery source and battery energy SOC accurately. Measured current range is -200A-+200A and the accuracy of measured battery energy SOC can achieve +-4%. It is provided with simple structure and easy maintenance.

Techniques for integrating two-phase cooling into a microprocessor chip package lid are provided. In one aspect, a vapor chamber lid device includes: an evaporator plate; a condenser plate attached to the evaporator plate such that a cavity is formed between the evaporator plate and the condenser plate; a thermal insulation layer sandwiched between the evaporator plate and the condenser plate; and a working fluid enclosed within the cavity, wherein the working fluid partially fills the cavity. At least one heat-dissipating device can be placed in thermal contact with the evaporator plate via a thermal interface material. A method is also provided for forming the vapor chamber lid device.

The invention discloses a method for automatically adapting to a mobile terminal. The method comprises the following steps of: setting software change caused by user requirement change or hardware configuration change according to a microprocessor chip and an embedded operating system selected for the mobile terminal; forming a series of parameters and various parameter files, wherein the parameter files are independent of image files of the embedded operating system in the mobile terminal; and matching the image files with different parameter files to automatically adapt to software change caused by specific user requirement change or specific hardware configuration change, wherein the parameter files are independent of the publishing and / or updating of the image files, and the image files are not required to be updated when the software change occurs. The method contributes to further increasing the product research and development efficiencies, shortening the product research and development periods and better publishing products more quickly.