System and method of determining memory ownership on cache line basis for detecting self-modifying code including code with instruction that overlaps cache line boundaries

Abstract

A system and method for determining memory ownership on a cache line basis for detecting self-modifying code with instructions that overlap cache line boundaries. An ownership index and a cache line address are entered into the ownership queue for each cache line. The cache lines are translated into instructions, and a straddle bit is set for each instruction that was derived from cache line data that overlapped two cache lines. A stale bit is set for any entry of the ownership queue that collides with a store instruction. Each instruction issued for execution is marked with a first exception when the stale bit of the corresponding ownership queue entry is set, or when the straddle bit of the issued instruction and a stale bit of a next sequential entry are both set. A first exception is performed for each instruction ready to retire that is marked with the first exception.

Description

CROSS REFERENCE TO RELATED APPLICATION(S)[0001]This application claims priority based on U.S. Provisional Application Ser. No. 62 / 324,945, filed Apr. 20, 2016, which is hereby incorporated by reference in its entirety.[0002]This application is related to the following co-pending U.S. patent applications, each of which has a common assignee and common inventors.[0003]FILINGSER. NO.DATETITLE15 / 156,391May 17, SYSTEM AND METHOD OF2016DETERMINING MEMORY OWNERSHIPON CACHE LINE BASIS FOR DETECTINGSELF-MODIFYING CODE INCLUDINGCODE WITH LOOPING INSTRUCTIONS15 / 156,416May 17, SYSTEM AND METHOD OF2016DETERMINING MEMORY OWNERSHIPON CACHE LINE BASIS FOR DETECTINGSELF-MODIFYING CODE15 / 156,429May 17, SYSTEM AND METHOD OF2016DETERMINING MEMORY OWNERSHIPON CACHE LINE BASIS FOR DETECTINGSELF-MODIFYING CODE INCLUDINGMODIFICATION OF A CACHE LINE WITHAN EXECUTING- INSTRUCTIONBACKGROUND OF THE INVENTION[0004]Field of the Invention[0005]The present invention relates in general to memory ownership, and more...

AI Technical Summary

Benefits of technology

The patent describes a method for detecting self-modifying code by analyzing cache lines and setting stale bits. The method includes fetching cache lines, determining an ownership index for each cache line, translating cache line data into instructions, setting straddle bits for each instruction, and marking instructions with a first exception if a stale bit is set. The technical effect of this method is to improve the detection of self-modifying code and improve the efficiency of the processor.

Problems solved by technology

At least one problem with prefetch and OOO operation is that instructions that have been prefetched and forwarded for execution may be subsequently modified by SMC.

Thus, an instruction that is already sent for execution may have missed the modification potentially causing improper or unintended operation.

If the icache attempts to read from memory owned by the dcache, ownership must be transferred from the dcache which is a slow and tedious process which tends to serialize operation.

Although 4 KB is not a significant amount of memory, SMC may cause thrashing of ownership between the icache and the dcache substantially reducing operating efficiency.

It has been observed that even 1 KB ownership granularity was still problematic for SMC in many situations.

Furthermore, larger page sizes are often used, such as 2 megabytes (MB) or even 1 gigabyte (GB), so that ownership granularity has remained a significant issue that reduces overall performance.

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