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A large-capacity and no-refresh high-speed statistical counter

A counter and large-capacity technology, applied in the field of statistical counters, can solve the problems of small refresh cycle, high implementation cost of statistical counters, and difficulty in meeting a large number of count entries, and achieve the effect of long refresh cycle and low implementation cost.

Active Publication Date: 2009-09-30
深圳市恒扬数据股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to provide a statistical counter, which aims to solve the problems in the prior art that the implementation cost of the statistical counter is high, it is difficult to meet a large number of counting items and the refresh cycle is small, and it cannot meet the actual needs

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  • A large-capacity and no-refresh high-speed statistical counter

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Embodiment Construction

[0024] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0025] figure 1 The structure of the statistical counter provided by the present invention is shown. The first-stage counter 101 periodically outputs the count value. The number of the first-stage counter 101 is not limited and can be increased or decreased according to actual needs. As an embodiment of the present invention, the first-stage counter 101 is implemented by using a register, and as another embodiment of the present invention, it may also be implemented by using a RAM.

[0026] The second stage counter 102 is realized by RAM, and the RAM is a dual-port, and one port is used to read th...

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Abstract

The present invention is applicable to the field of chip design, and provides a large-capacity non-refresh high-speed statistical counter, which includes: at least one first-stage counter, a gate, an accumulator, a second-stage counter, and a refresh controller , the second-stage counter is a RAM counter. The statistical counter provided by the present invention can meet the application requirements of a large number of counting items, a long refresh period, and fast statistics, and has low implementation cost.

Description

technical field [0001] The invention belongs to the field of chip design, in particular to a statistical counter. Background technique [0002] In chip design, the statistical counter is an essential functional module, which provides an important means for monitoring the state information inside the chip. For example, in a data communication chip, statistical counters are used to count the number of packets and traffic of each interface, or to count certain types of packets. [0003] When using statistical counters in chip design, the following requirements should be met: [0004] 1. The statistical counter must be able to quickly record the increased value. In order to be able to count accurately, the statistical counter must be able to increase the required count value every clock cycle. [0005] 2. The number of statistical counting items should be as many as possible. In order to obtain more statistical information inside the chip, the number of counters is increasin...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K21/38H03K23/00
Inventor 王峻邓子星李浩
Owner 深圳市恒扬数据股份有限公司