Storage unit, integrated circuit and manufacturing method of the storage unit array
A memory cell and conductivity type technology, which is applied in the manufacture of integrated circuits and memory cell arrays, and in the field of memory cells, can solve the problems of aggravating the problem of non-uniform threshold voltage and increasing the ratio.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0092] Please refer to the following instructions Figures 1 to 18c To understand the various embodiments of the present invention.
[0093] figure 1 It is a schematic diagram of a part of a NAND gate array, in which the shallow trench isolation is located in area 10, and the side pocket implants are located in areas 11 and 12. The memory cells are located in series of NAND gates, where figure 1The first series of NAND gates includes storage units 16-1 to 16-N connected in series, and the second series of NAND gates includes storage units 26-1 to 26-N connected in series, and N can be 16, 32 or higher values. The corresponding word line WL 1 to WL N The collection of NAND gates is coupled to the corresponding memory cells in the series of NAND gates. The selection of the series of NAND gates is achieved by controlling the block transistors 15, 25 and the source selection transistors 17, 27, wherein the former uses The control line BLT is used to connect the memory cells ...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


