Integration data receiving method and receiver

Abstract

The invention discloses a data receiving method and a receiver, firstly in one clock signal response, N (N is a natural number) input differential pairs are integrated and amplified, in a first clocksignal response, an electric level of at least one pair of differential signals is pre-charged to power supply voltage, in a second clock signal response, an integration result of at least one pair ofdifferential signals is output, and then, in one clock signal response, at least one input differential pair is detected and amplified to output as a detected data. A receiver comprises an integration circuit and a detecting amplifying circuit, firstly a first stage integration circuit comprises an integration element, a capacitor, a discharge branch circuit MOS tube and a charge element MOS tube, secondly, a second stage detecting amplifying circuit comprises a detecting amplifying element and a latched output element to detect and amplify the first stage integration result, an input of thelatched output element is connected with an output of the detecting amplifying element to latch and output detected amplified results.

Description

technical field [0001] The present invention relates to semiconductor devices, more specifically, to a method for receiving integrated data, and a data receiver using the receiving method, which is used to integrate the received data signal synchronized with the clock to detect the received data. Background technique [0002] Internationally, small-swing differential signals are widely used in interface circuits of high-speed systems to transmit high-speed data signals. Currently, a variety of high-speed data receiving methods have been proposed, most of which are based on the principle of reference voltage comparison, such as US Patent 6160423 (US Patent 6160423). [0003] In the above patent document, a method for receiving a single-ended data input signal using a single-ended voltage and time reference synchronous oscillator source SSVTR and its complementary signal SSVTR is described. [0004] The data receiver proposed in the above-mentioned patent documents simultane...

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Problems solved by technology

[0008] However, since the data receiving method proposed in the above-mentioned patent documents is still based on the comparator principle, the ability to suppress high-frequency noise on the input signal is not strong; at the same time, since the flip point of the inverter will vary with the circuit technology, operating voltage and changes, so the received data cannot be guaranteed to be accurately detected

In addition, if the input signal level of the comparator is low, it is also difficult to accurately detect the received data

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