Memory access control method

Abstract

The invention provides a memory control method. A read write command is decoded to generate a mode memory setup signal; when the mode memory setup signal is enabled, a flip-latch outputs a memory vault selection signal; afterwards, the memory vault selection signal is decoded to generate a register selection signal. The register selection signal can select a register so as to write an address signal into the selected register. And the value of a certain register can be used for determining whether an error checking function is enabled. Therefore, the next-generation memory framework which supports the CRC function can be compatible with the original memory framework.

Description

technical field The present invention relates to a memory access control method, and more particularly to a memory access control method capable of determining whether to perform a cyclic redundancy check (CRC). Background technique In a communication system or a computer system, a cyclic redundancy check (CRC) can be used to improve the error checking capability. After data transmission or data storage, CRC can be used to check whether errors occurred during data transmission. In the process of data transmission, both the receiving and sending parties need to perform CRC calculations, and then one party compares the CRC calculation results calculated by both parties to know whether the received data has errors. As the data transmission speed of the computer system becomes faster and faster, the existing memory architecture can no longer guarantee the correct rate of data transmission of the memory. Therefore, in the next-generation memory architecture, the CRC error chec...

AI Technical Summary

Problems solved by technology

The invention is a memory access control method, which is used to solve the problem that the memory containing the CRC function cannot be upwardly compatible with the old memory transmission architecture