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Method for designing key unit of DES encryption system based on reversible logical gate

A key, gate-level technology, applied in logic circuits using basic logic circuit components, encryption devices with shift registers/memory, logic circuits using specific components, etc., can solve the problem of high power consumption requirements, reduce System energy consumption, the effect of avoiding energy loss

Inactive Publication Date: 2009-09-30
NANTONG UNIVERSITY
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Problems solved by technology

[0004] The object of the present invention is to provide a reversible data selector based on reversible logic gates, a reversible bidirectional shift register and a key unit based on reversible logic gates, which are used to solve the data encryption problem with relatively high power consumption requirements in DES encryption systems

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  • Method for designing key unit of DES encryption system based on reversible logical gate
  • Method for designing key unit of DES encryption system based on reversible logical gate
  • Method for designing key unit of DES encryption system based on reversible logical gate

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Embodiment Construction

[0014] DES encryption system consists of three parts: control unit, key unit and operation unit. The control unit is mainly composed of counters; the key unit is mainly composed of data selectors, shift registers and XOR gates; the arithmetic unit is mainly composed of shift registers. The devices in each functional unit are designed with reversible logic gates, and then the reversible design of each functional unit is completed, which can avoid energy loss caused by the loss of logic information bits in the system and reduce system energy consumption.

[0015] This application mainly introduces the key unit designed based on the reversible logic gate in the encryption system.

[0016] Under the control of the main control unit, the key unit receives the initial key from the external circuit, and generates the subkey needed for encryption and decryption. First, accept the key. Since the effective key in the initial key is only 56 bits, a reversible shift register with a lengt...

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Abstract

The invention relates to a method for designing a key unit of a DES encryption system based on a reversible logical gate. A one-from-the-four data selector and a reversible D trigger which are based on a reversible logical gate are formed by using the cascade connection of a Fredkin gate and a Feynman gate, a reversible circuit of a bidirectional shift register is formed on the basis of the one-from-the-four data selector and the reversible D trigger, and finally the reversible design of the key unit of the DES encryption system is realized. Due to the design on main components of the key unit of the DES encryption system based on the reversible logical gate, the energy loss caused by the loss of logical information bits in the DES encryption system is avoided and the power consumed by the DES encryption system is reduced.

Description

technical field [0001] The invention relates to a key unit of a DES encryption system, in particular to a key unit of a low-power consumption DES encryption system based on reversible logic gates. Background technique [0002] The DES encryption algorithm is the most widely used private encryption algorithm in the encryption system so far. It is usually divided into two forms: hardware and software. Large, slow implementation speed and security cannot be guaranteed. The encryption / decryption implemented by hardware has the characteristics of high speed and high reliability, and can be applied to mobile devices such as smart cards, mobile phones, and wireless sensors. And these mobile devices have very strict requirements on power consumption, so it is of great significance to study how to design a low-power encryption system. [0003] Landauer pointed out that in irreversible logic calculations, the loss of each bit of information generates kTln2 joules of heat, where k is...

Claims

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Application Information

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IPC IPC(8): H03K19/173G11C19/00H04L9/06
Inventor 朱文颖管致锦倪丽惠
Owner NANTONG UNIVERSITY
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