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Level shift circuit, level shift circuit driving method, and semiconductor circuit apparatus having level shift circuit

A level-shifting circuit and level-shifting technology, applied in the direction of logic circuit connection/interface layout, logic circuit, logic circuit coupling/interface using field effect transistors, etc., can solve problems such as increasing battery consumption

Inactive Publication Date: 2012-08-29
SOCIONEXT INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, the consumption of the battery used to drive the above-mentioned system LSI will increase

Method used

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  • Level shift circuit, level shift circuit driving method, and semiconductor circuit apparatus having level shift circuit
  • Level shift circuit, level shift circuit driving method, and semiconductor circuit apparatus having level shift circuit
  • Level shift circuit, level shift circuit driving method, and semiconductor circuit apparatus having level shift circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0055] Embodiment 1 is a level shifting circuit characterized in that the level shifting circuit is connected to at least two power sources and a ground power source and prevents the inverter section constituting the level shifting circuit from the breakdown current.

[0056] use figure 1 , figure 2 as well as image 3 , Embodiment 1 will be described.

[0057]

[0058] figure 1 The level shift circuit of Embodiment 1 is shown. The level shift circuit of Embodiment 1 includes: a level shift unit 19 , an inverter unit 20 , and an N-type MOS transistor 12 . Wherein, the level shift unit 19 includes: a P-type MOS transistor 2 connected to the high-potential power supply 1, an input terminal 3, an N-type MOS transistor 4 connected to the ground potential power supply 14, and a P-type MOS transistor connected to the low-potential power supply 5 6. N-type MOS transistor 7 connected to ground potential power supply 14 , P-type MOS transistor 8 connected to high potential pow...

Embodiment 2

[0105] Embodiment 2 involves adding a P-type MOS transistor between the P-type MOS transistor 2 and the N-type MOS transistor 4 of the level shifting circuit of the embodiment 1, and adding a P-type MOS transistor between the P-type MOS transistor 8 and the N-type MOS transistor. A level shift circuit of P-type MOS transistors is added between the transistors 9 . Use attached Figure 4 Example 2 will be described.

[0106]

[0107] Figure 4 The level shift circuit of Embodiment 2 is shown. The level shifting circuit of embodiment 2 comprises: in the level shifting part 19 of embodiment 1, added the level shifting part 21 of P-type MOS transistor 30 and P-type MOS transistor 31; 20 ; and an N-type MOS transistor 12 connected to the ground power supply 14 to supply the ground potential to the inverter unit 20 .

[0108] The level shifter 21 operates as a latch type circuit that latches a signal that swings between a potential and a ground potential corresponding to a low ...

Embodiment 3

[0136] Embodiment 3 relates to a semiconductor circuit device including an analog circuit, a logic circuit, and the level shift circuit of Embodiment 1 or 2 that receives a control signal from the logic circuit and outputs a signal to the analog circuit. Use attached Figure 5 Example 3 will be described.

[0137] Figure 5 A semiconductor circuit device 50 of Embodiment 3 is shown. The semiconductor circuit device 50 includes: a high-potential power supply terminal 40 that accepts a high-potential supply, an analog circuit 41, a level shift circuit 42, a signal transmission circuit 43, a logic circuit 44, a low-potential power supply terminal 45 that accepts a low-potential supply, and a receiving An input terminal 46 for inputting a signal, and an output terminal 47 for outputting an output signal.

[0138] Although the analog circuit 41 was used above, any circuit may be used as long as it can be driven by a high potential. In addition, although the logic circuit 44 was...

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PUM

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Abstract

The invention relates to a level shift circuit wherein no surplus currents occur. The level shift circuit is characterized by comprising a level shift part that is connected to a high potential powersupply for generating a high potential, a low potential power supply for generating a low potential and to a ground power supply for generating a ground potential, receives and converts a low potential signal, the amplitude of which is between the low potential and the ground potential, to a high potential signal the amplitude of which is between the high potential and the ground potential and that outputs the high potential signal; an inverter part that inverts and amplifies the high potential signal from the level shift part; and an N-type MOS transistor that is series connected to the inverter part between the high potential power supply and the ground power supply, has its gate electrode connected to the low potential power supply and that supplies the ground potential to the inverterpart. Additionally, this level circuit can be used to provide a semiconductor circuit apparatus wherein no surplus currents occur independently of the order in which the analog and logic power supplies are turned on.

Description

technical field [0001] The present invention relates to a level shift circuit and a driving method thereof, and a semiconductor circuit device having a level shift circuit, and in particular to a level shift circuit and a driving method thereof which prevent residual current from flowing regardless of the order in which power is turned on. And a semiconductor circuit device having a level shift circuit. Background technique [0002] In a so-called system LSI that mounts both analog circuits and logic circuits, when there are multiple power supply systems such as an analog power supply and a logic power supply, the order of turning on the power is specified in the specification. [0003] Also, if the power is turned on in a sequence different from the above, excessive residual current will flow in the circuit. [0004] For example, in a system LSI in which a circuit operating using an analog power supply is driven by a signal from a circuit operating using a logic power supp...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K5/02
CPCH03K19/018528H03K19/0185H03K5/02
Inventor 船越纯
Owner SOCIONEXT INC