Methods, apparatuses, and systems for fabricating three dimensional integrated circuits
An integrated circuit, three-dimensional technology, applied in lengths ranging from a few microns to 20 microns or more. It can solve the problem of not meeting all these requirements for the manufacture of three-dimensional integrated circuits, etc.
Active Publication Date: 2012-10-03
LAM RES CORP
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[0007] Clearly, all these requirements for fabricating 3D ICs cannot be met using standard 2D IC fabrication techniques
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[0015] The present invention relates to interconnect metallization for three-dimensional integrated circuits. More specifically, the present invention relates to forming the metallization to form metallized wiring through the semiconductor wafer from the front side to the back side of the semiconductor wafer. This metallization is used for superordinate semiconductor wafers used in three-dimensional integrated circuits.
[0016] In the following, the operation of embodiments of the present invention is primarily discussed in the context of the processing of semiconductor wafers for use in stacked wafer three-dimensional integrated circuits. More precisely, the operation of embodiments of the present invention is discussed in the context of the processing of silicon wafers for three-dimensional silicon integrated circuits. However, it should be understood that embodiments of the present invention may be applied to other semiconductor devices and other semiconductor wafers.
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Abstract
The present invention pertains to methods, apparatuses, and systems for fabricating three-dimensional integrated circuits. One embodiment of the method comprises providing a wafer or other substrate having a plurality of through holes. In addition, the method includes supporting the wafer or other substrate with a wafer or other substrate holder mounted in a process chamber. The method further includes generating a pressure differential between the front side of the wafer or other substrate and the back side of the wafer or other substrate while the wafer or other substrate is supported on the wafer or other substrate holder so that the pressure differential causes fluid flow through the through holes. Also, the method includes establishing process conditions in the process chamber for at least one process to fabricate integrated circuits. Embodiments of a system and embodiments of an apparatus according to the present invention are also presented.
Description
[0001] cross reference [0002] This application claims that the application serial number is 60 / 876407, the file number is XCR-003, the name is "METHODS, APPARATUSES, AND SYSTEMS FORFABRICATING THREE DIMENSIONAL INTEGRATEDCIRCUITS", the applicants are Shijian LI, Fritz REDEKER and Yezdi DORDI, and the application date is December 2006 The benefit of the US patent application dated 20 March. The content of the US patent application with application serial number 60 / 876407 filed on December 20, 2006 is hereby incorporated by reference. Background technique [0003] The present invention relates to three-dimensional integrated circuits and devices, methods and systems for fabricating three-dimensional integrated circuits; more precisely, the present invention relates to devices, methods and systems for interconnect metallization of three-dimensional integrated circuits. [0004] A three-dimensional integrated circuit includes two or more semiconductor chips with integrated circ...
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IPC IPC(8): H01L21/027H01L21/687
CPCC23C16/045H01L21/76898H01L21/68714H01L23/481C23C16/4586H01L21/6838H01L21/67017H01L2924/12044H01L2924/0002Y10T24/44H01L2924/00012H01L2924/00H01L21/02H01L21/683H01L21/70H01L21/677
Inventor 李时健弗里茨·雷德克耶兹迪·多尔迪
Owner LAM RES CORP