Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

High-spectrum image dimensionality reduction chip

A hyperspectral image and dimensionality reduction technology, which is applied in the field of image processing, can solve the problems of real-time processing and no human hyperspectral image real-time dimensionality reduction processing, etc., to achieve high module utilization efficiency, low R&D risk, and short development cycle Effect

Inactive Publication Date: 2010-06-30
BEIJING INSTITUTE OF TECHNOLOGYGY
View PDF0 Cites 21 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] At present, Hongtao Du, Hairong Qi and GregoryD.Peterson of the University of Tennessee abroad proposed the idea of ​​using FPGA to achieve dimensionality reduction of hyperspectral images in the paper "Parallel ICA and its hardware implementation inhyperspectral image analysis", but they did not realize the function of real-time processing
Domestic hyperspectral image data dimensionality reduction technologies are all in the theoretical research stage, and no one uses FPGA for hardware to realize real-time dimensionality reduction processing of hyperspectral imagery

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-spectrum image dimensionality reduction chip
  • High-spectrum image dimensionality reduction chip
  • High-spectrum image dimensionality reduction chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0020] The present invention will be further described below in conjunction with the drawings and specific embodiments.

[0021] See figure 1 Diagram of the structure of the chip system module. In this embodiment, the Vertix5 series experiment board of Xilinx Company is used to design, simulate and verify the dimensionality reduction chip. The entire chip system can be divided into five modules: system control module, autocorrelation module, eigenvalue solving module, eigenvalue extraction module, and dimension reduction realization module. Because of the massive nature of hyperspectral image data, there are not enough storage units inside the FPGA to store the entire hyperspectral image. Therefore, it is necessary to add an external storage unit. At the same time, it is necessary to add a data input buffer at the front end of the image transmission to make the hyperspectral image. The image data is output to subsequent modules in the form of a block matrix. The divided modules...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a high-spectrum image dimensionality reduction chip, which belongs to the field of image processing. The chip mainly completes the real-time dimensionality reduction processing on a large amount of high-spectrum image data. The chip is completed by adopting the VHDL speech, and is realized through being based on an in-site programmable gate array. The system chip manly comprises five parts: a system control module, a self correlation module, a feature value solving module, a feature value extracting module and a dimensionality reduction realization module. The invention can complete the real-time dimensionality reduction processing of the high-spectrum image data, and has the advantages of short development period, low design cost and low development risk.

Description

Technical field [0001] The invention belongs to the field of image processing, and relates to a hyperspectral image dimension reduction chip and an implementation method. Background technique [0002] Hyperspectral images are ground object images acquired by a hyperspectral imager in hundreds of continuous narrow bands from visible light to near infrared. Therefore, hyperspectral images have multiple bands, high spectral resolution, a large amount of information, and a huge amount of data. However, the problems it brings are high information redundancy, large space required for data storage, and long processing time. Therefore, it is very important to reduce the dimensionality before processing and analyzing the hyperspectral image. [0003] The real-time processing of massive hyperspectral images is a hot research topic at home and abroad. The main technical approach to solve the real-time data processing of hyperspectral images is to reduce the dimensionality of hyperspectral im...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 谌德荣彭林科何光林
Owner BEIJING INSTITUTE OF TECHNOLOGYGY
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products