Unlock instant, AI-driven research and patent intelligence for your innovation.

Apparatus and method for activating and providing multi-core configuration on bus

A bus, enabling technology, applied in the field of microelectronics, which can solve problems such as timing offset and high frequency noise

Active Publication Date: 2010-09-15
VIA TECH INC
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, driving the I / O signal to the actual pull-up termination impedance will cause high frequency noise (High Frequency Noise), reflection (Reflection), ringing (Ringing), timing offset (Timing Displacement) and other defects

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Apparatus and method for activating and providing multi-core configuration on bus
  • Apparatus and method for activating and providing multi-core configuration on bus
  • Apparatus and method for activating and providing multi-core configuration on bus

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0022] In order to make the features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below, together with the attached drawings Figure 1 to Figure 8 , to explain in detail. The description of the present invention provides different examples to illustrate the technical features of different implementations of the present invention. Wherein, the configuration of each element in the embodiment is for illustration, not for limiting the present invention. Moreover, part of the symbols in the figures in the embodiments is repeated, for the sake of simplicity of description, it does not imply the relationship between different embodiments.

[0023] In view of the bus interface discussed in the prior art and related technologies used to transfer data between devices in integrated circuits, in the following, Figure 1 to Figure 3 will illustrate the problems created by multiple actively terminated buses, while Figure 5 to ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

An apparatus and method for activating and providing a multi-core configuration on a bus, wherein the bus is controlled by an initiative terminal impedance. The apparatus includes a first node, a location array and a plurality of drivers. The first node is arranged in a processor core and used for receiving an external multi-package signal, and the multi-package signal indicates whether the package upon which the processor core is disposed is internal to the bus or at a far end of the bus. The location array is arranged in the processor core and used for generating a plurality of location signals indicating locations of nodes coupled to the bus, wherein the locations are either an internal location or a bus end location. The plurality of drivers are coupled to the locations, each driver has one of the nodes and is used to control the node to be drive so as to respond a first state of a corresponding location signal of the location signals and a second state of the first node. The invention provides good bus initiative impedance control and preserves requiredd transmission line characteristics.

Description

technical field [0001] The present invention relates to microelectronics, and in particular to a mechanism for enabling and maintaining multiple processor contexts on a bus that require active control of bus termination impedance, wherein the multiple processor contexts include A processor package substrate (Processor Package Substrate) has a plurality of processor dies on it. Background technique [0002] Currently, in order to support fast incident wave switching (Incident Wave Switching) with low output amplitude (Low Output Swing), the bus architecture provides a point-to-point bus interface (Point- To-Point Bus Interface). In addition to providing a point-to-point bus interface, the bus architecture also requires the microprocessor (or other devices) to provide an internal termination impedance control circuit to dynamically adjust the termination impedance on the point-to-point bus, where the impedance value can generally be selected to match the characteristics of th...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40
CPCH04L25/0298G06F13/4086H01L2924/19043
Inventor 达鲁斯·D·嘉斯金斯詹姆斯·R·隆柏格
Owner VIA TECH INC
Features
  • R&D
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More