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High-speed cyclic redundancy check (CRC) device and implementation method thereof

A cyclic redundancy check, high-speed technology, applied in the field of data transmission

Inactive Publication Date: 2014-02-05
NEW H3C TECH CO LTD
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Problems solved by technology

[0002] In order to realize the CRC calculation of 512-bit wide input, the CRC calculation module needs to run at 312.5MHZ. Currently, the existing CRC calculation module can only support 64-bit wide input and run at 312.5MHZ, that is, a total of 20G bandwidth
However, general protocols, such as the interlaken protocol, need to implement CRC operations with a bandwidth of 156G. Therefore, the existing CRC operations with a bandwidth of 20G are far from meeting the needs of the interlaken protocol.

Method used

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  • High-speed cyclic redundancy check (CRC) device and implementation method thereof
  • High-speed cyclic redundancy check (CRC) device and implementation method thereof

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Embodiment Construction

[0036] In order to solve the problems in the prior art, the present invention provides a high-speed CRC device, that is, by grouping the input data and marking different grouped buffers, and then the first reading module can read each clock cycle separately cache the data in different groups, and perform CRC operation on each data block in all grouped data at the same time in units of beats, and then cache all the CRC operation results, and the second reading module follows the same method as the first reading module In the same manner, the CRC operation result is read and cached, and finally the cached CRC operation result is output according to the grouping mark.

[0037] Based on the above introduction, the specific realization of the scheme of the present invention includes:

[0038] The data distribution module is used to divide the input data into N groups, and establishes a grouping mark for each grouped data; the first storage module is used to store the N grouped data...

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Abstract

The invention discloses a high-speed cyclic redundancy check (CRC) device and an implementation method thereof. The method comprises the following steps of: grouping input data and caching after marking different groups; respectively reading data cached in the different groups in each clock period by using a first reading module; after performing a CRC operation on each data block in all grouped data at the same time by taking beat as a unit, caching all CRC operation results; caching the CRC operation results after reading by using a second reading module in the same mode as that of the first reading module; and finally, outputting cached CRC operation results according to grouping marks. By using the high-speed CRC operation device and the implementation method thereof, the high-speed CRC operation can be realized in the situation of utilizing an internal cache of a logic device.

Description

technical field [0001] The invention relates to the technical field of data transmission, in particular to a high-speed cyclic redundancy check (CRC) device and an implementation method thereof. Background technique [0002] To realize the CRC calculation of 512-bit wide input, the CRC calculation module needs to run at 312.5MHZ. The existing CRC calculation module can only support 64-bit wide input at 312.5MHZ, that is, a total of 20G bandwidth. However, general protocols, such as the interlaken protocol, need to implement CRC operations with a bandwidth of 156G. Therefore, the existing CRC operations with a bandwidth of 20G are far from meeting the needs of the interlaken protocol. Contents of the invention [0003] In view of this, the present invention provides a high-speed CRC device capable of realizing high-speed CRC calculation. [0004] The invention also provides a method for realizing high-speed CRC, which can realize high-speed CRC operation. [0005] In orde...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/09
Inventor 王彬
Owner NEW H3C TECH CO LTD
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