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Method for detecting source leakage defect of PMOS (P-channel metal oxide semiconductor) device

A detection method and device technology, applied in the direction of electronic circuit testing, non-contact circuit testing, etc., can solve problems that trouble engineers, and achieve the effect of helping the yield detection process

Active Publication Date: 2013-07-31
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the electron beam energy that can be excited by existing equipment is usually less than the E of the metal interconnection line 2 For example, the maximum excitation energy of the existing commonly used electron beam defect scanning machine is 2.8KeV, while the E2 of the metal interconnection line exceeds 3.0KeV
How to use the existing electron beam defect scanning equipment to complete the source and drain leakage detection of PMOS devices in practice has become a difficult problem for engineers in this field

Method used

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  • Method for detecting source leakage defect of PMOS (P-channel metal oxide semiconductor) device
  • Method for detecting source leakage defect of PMOS (P-channel metal oxide semiconductor) device
  • Method for detecting source leakage defect of PMOS (P-channel metal oxide semiconductor) device

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Embodiment Construction

[0016] From the perspective of thinking, the purpose of the present invention is to deposit a dielectric layer on the metal interconnection, so that the electron reflectivity relationship curve of the metal interconnection is changed, and the E2 of the metal interconnection is reduced to the existing electron beam defect within the operating range of the scanning device.

[0017] see image 3 The method for detecting source-drain leakage defects of PMOS devices proposed by the present invention comprises the following steps: (a) providing a wafer, which includes a substrate 1, a well region 2 formed in the substrate 1, and a well region 2 formed in the well region 2 The gate 3 of the PMOS device on the gate 3, the source 4 and the drain 5 of the PMOS device formed in the well region 2 on both sides of the gate 3, the insulating dielectric layer 6 formed on the substrate 1 and the gate 3, in the insulating The surface of the dielectric layer 6 forms a metal interconnection 7 c...

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Abstract

The invention relates to a method for detecting a source leakage defect of a PMOS (P-channel metal oxide semiconductor) device, which comprises the following steps of: (a) providing a wafer which comprises a substrate, a well region, a grid electrode, a source electrode, a leakage electrode, an insulating medium layer, and a metal connecting wire communicated with the source electrode or the leakage electrode; (b) at least depositing a dielectric layer on the surface of the metal connecting wire, thereby reducing a second crossing point of a relation curve between the electron reflectivity ofthe metal connecting wire and the incident electron energy to E2'; and (c) emitting an electron beam to scan the surface of the wafer to detect the source leakage having the leakage defect, wherein the energy of the electron beam exceeds E2'. By using the method, the source leakage defect detection can be performed by using lower electron beam energy and can be performed within a limit range of an existing electron beam defect scanner platform, thereby being helpful to the yield detection process for the PMOS device.

Description

technical field [0001] The invention relates to a detection method for defects in semiconductors, in particular to a detection method for source and drain defects of PMOS devices. Background technique [0002] As the size of semiconductor devices shrinks day by day, the problem of ion leakage has gradually become a key factor affecting the yield of devices. For example, for PMOS devices, when the size is reduced to 45nm and smaller, the source-drain leakage problem greatly limits the yield of the device. [0003] A common detection method for source-drain leakage defects of PMOS devices is: see figure 1 , First, metal interconnection lines are formed on the source and drain; then the surface of the wafer is scanned with an electron beam (E-BEAM), and defect regions are found by comparing adjacent repeating units. For example, there are multiple adjacent repeating units on a certain die (pipe core, or called a grain) of the wafer. Taking the first repeating unit, the second...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/307
Inventor 范荣伟吴浩王恺赵宁龙吟
Owner SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORP